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BranchCommit messageAuthorAge
debugUpdate the debug CSR definitions for the proposed 0.13 debug specPalmer Dabbelt7 years
incoresemi-migration-to-new-formatMerge branch 'migration-to-new-format' of https://github.com/incoresemi/riscv...Andrew Waterman2 years
masterMerge pull request #257 from ved-rivos/smdbltrp1Andrew Waterman2 days
riscv-bitmanipRemove subu.wAndrew Waterman4 years
rnmiAdd RNMI CSRs and instructionAndrew Waterman2 years
rvvFix config immsColin Schmidt5 years
vCSRRx is called ZicsrAndrew Waterman6 years
vadcUpdate encoding of vadc and friendsAndrew Waterman5 years
wfmiAdd wfmi instructionAndrew Waterman3 years
zfhAdd tentative RV32Zfh encodingAndrew Waterman4 years
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AgeCommit messageAuthorFilesLines
2018-11-06CSRRx is called ZicsrvAndrew Waterman1-1/+1
2018-11-06Split V table from rest of tableAndrew Waterman1-1/+4
2018-11-06Updates from most recent meetingAndrew Waterman2-7/+12
2018-11-06V extension WIPAndrew Waterman4-10/+217
2018-11-06Separate FENCE.I and CSRRx from RV32I tableAndrew Waterman1-9/+15
2018-09-20Add header following Go convention for generated code (#21)Tobias Klauser1-1/+1
2018-09-10Include RVC pseudos in chisel decoderAndrew Waterman1-1/+1
2018-08-25Improve TeX output for FENCE instructionsAndrew Waterman2-3/+3
2018-08-06FENCE has a field called FM in bits 31:28Andrew Waterman2-2/+3
2018-07-17Make the hashbang portable (#20)Edward Tomasz NapieraƂa1-1/+1
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