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| author | Andrew Waterman <andrew@sifive.com> | 2021-06-07 13:15:43 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-06-07 13:15:43 -0700 |
| commit | 2d4df20c0154556d900f458775959b807a896607 (patch) | |
| tree | 3c63d28819a283a92b4c27331489ffa4ec6d3825 | |
| parent | 0c8505ccfa2f23bba1009a391f11d59ec1a8f517 (diff) | |
| download | riscv-opcodes-wfmi.zip riscv-opcodes-wfmi.tar.gz riscv-opcodes-wfmi.tar.bz2 | |
Add wfmi instructionwfmi
| -rw-r--r-- | opcodes-system | 1 | ||||
| -rwxr-xr-x | parse_opcodes | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/opcodes-system b/opcodes-system index 9517814..078506a 100644 --- a/opcodes-system +++ b/opcodes-system @@ -7,6 +7,7 @@ mret 11..7=0 19..15=0 31..20=0x302 14..12=0 6..2=0x1C 1..0=3 dret 11..7=0 19..15=0 31..20=0x7b2 14..12=0 6..2=0x1C 1..0=3 sfence.vma 11..7=0 rs1 rs2 31..25=0x09 14..12=0 6..2=0x1C 1..0=3 wfi 11..7=0 19..15=0 31..20=0x105 14..12=0 6..2=0x1C 1..0=3 +wfmi 11..7=0 19..15=0 31..20=0x005 14..12=0 6..2=0x1C 1..0=3 csrrw rd rs1 imm12 14..12=1 6..2=0x1C 1..0=3 csrrs rd rs1 imm12 14..12=2 6..2=0x1C 1..0=3 csrrc rd rs1 imm12 14..12=3 6..2=0x1C 1..0=3 diff --git a/parse_opcodes b/parse_opcodes index 28c4f05..4643fa0 100755 --- a/parse_opcodes +++ b/parse_opcodes @@ -887,7 +887,7 @@ def make_supervisor_latex_table(): print_subtitle('Trap-Return Instructions') print_insts('uret', 'sret', 'mret') print_subtitle('Interrupt-Management Instructions') - print_insts('wfi') + print_insts('wfi', 'wfmi') print_subtitle('Supervisor Memory-Management Instructions') print_insts('sfence.vma') print_subtitle('Hypervisor Memory-Management Instructions') |