rocket-tools/riscv-gnu-toolchain/binutils.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-04-03	opcodes/arm: adjust whitespace in cpsie instruction	Andrew Burgess	2	-4/+4
2023-04-03	ubsan: aarch64 parse_vector_reg_list	Alan Modra	1	-4/+4
2023-03-31	RISC-V: Allocate "various" operand type	Tsukasa OI	1	-17/+47
2023-03-31	x86: convert testcases to use .insn	Jan Beulich	39	-523/+346
2023-03-31	x86: document .insn	Jan Beulich	2	-0/+133
2023-03-31	x86: handle immediate operands for .insn	Jan Beulich	6	-4/+182
2023-03-31	x86: allow for multiple immediates in output_disp()	Jan Beulich	1	-5/+5
2023-03-31	x86: handle EVEX Disp8 for .insn	Jan Beulich	5	-1/+149
2023-03-31	x86: process instruction operands for .insn	Jan Beulich	6	-21/+432
2023-03-31	x86: parse special opcode modifiers for .insn	Jan Beulich	1	-1/+38
2023-03-31	x86: parse VEX and alike specifiers for .insn	Jan Beulich	5	-6/+250
2023-03-31	x86: introduce .insn directive	Jan Beulich	6	-10/+213
2023-03-30	aarch64: Add the RPRFM instruction	Richard Sandiford	7	-1/+186
2023-03-30	aarch64: Add the SVE FCLAMP instruction	Richard Sandiford	8	-1/+102
2023-03-30	aarch64: Add new SVE shift instructions	Richard Sandiford	7	-0/+97
2023-03-30	aarch64: Add new SVE saturating conversion instructions	Richard Sandiford	7	-0/+93
2023-03-30	aarch64: Add new SVE dot-product instructions	Richard Sandiford	9	-12/+186
2023-03-30	aarch64: Add the SVE BFMLSL instructions	Richard Sandiford	7	-0/+143
2023-03-30	aarch64: Add the SME2 UZP and ZIP instructions	Richard Sandiford	7	-0/+352
2023-03-30	aarch64: Add the SME2 UNPK instructions	Richard Sandiford	7	-0/+188
2023-03-30	aarch64: Add the SME2 shift instructions	Richard Sandiford	15	-3/+384
2023-03-30	aarch64: Add the SME2 saturating conversion instructions	Richard Sandiford	14	-0/+328
2023-03-30	aarch64: Add the SME2 FP<->FP conversion instructions	Richard Sandiford	7	-0/+102
2023-03-30	aarch64: Add the SME2 FP<->int conversion instructions	Richard Sandiford	7	-0/+245
2023-03-30	aarch64: Add the SME2 CLAMP instructions	Richard Sandiford	7	-0/+407
2023-03-30	aarch64: Add the SME2 MOPA and MOPS instructions	Richard Sandiford	7	-0/+177
2023-03-30	aarch64: Add the SME2 vertical dot-product instructions	Richard Sandiford	28	-0/+556
2023-03-30	aarch64: Add the SME2 dot-product instructions	Richard Sandiford	28	-0/+2355
2023-03-30	aarch64: Add the SME2 MLALL and MLSLL instructions	Richard Sandiford	22	-0/+2317
2023-03-30	aarch64: Add the SME2 MLAL and MLSL instructions	Richard Sandiford	8	-0/+2084
2023-03-30	aarch64: Add the SME2 FMLA and FMLS instructions	Richard Sandiford	15	-0/+1129
2023-03-30	aarch64: Add the SME2 maximum/minimum instructions	Richard Sandiford	8	-6/+2218
2023-03-30	aarch64: Add the SME2 ADD and SUB instructions	Richard Sandiford	22	-1/+1424
2023-03-30	aarch64: Add the SME2 ZT0 instructions	Richard Sandiford	11	-12/+746
2023-03-30	aarch64: Add the SME2 predicate-related instructions	Richard Sandiford	26	-24/+2680
2023-03-30	aarch64: Add the SME2 multivector LD1 and ST1 instructions	Richard Sandiford	29	-0/+6804
2023-03-30	aarch64: Add the SME2 MOVA instructions	Richard Sandiford	10	-2/+1598
2023-03-30	aarch64: Add support for predicate-as-counter registers	Richard Sandiford	15	-3/+331
2023-03-30	aarch64; Add support for vector offset ranges	Richard Sandiford	11	-0/+84
2023-03-30	aarch64: Add support for vgx2 and vgx4	Richard Sandiford	13	-1/+119
2023-03-30	aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array	Richard Sandiford	1	-1/+1
2023-03-30	aarch64: Add +sme2	Richard Sandiford	3	-0/+6
2023-03-30	aarch64: Prefer register ranges & support wrapping	Richard Sandiford	11	-982/+1038
2023-03-30	aarch64: Add support for strided register lists	Richard Sandiford	4	-27/+53
2023-03-30	aarch64: Rename some of GAS's REG_TYPE_* macros	Richard Sandiford	1	-71/+71
2023-03-30	aarch64: Add a aarch64_cpu_supports_inst_p helper	Richard Sandiford	1	-2/+1
2023-03-30	aarch64: Tweak priorities of parsing-related errors	Richard Sandiford	2	-11/+51
2023-03-30	aarch64: Try to report invalid variants against the closest match	Richard Sandiford	4	-93/+101
2023-03-30	aarch64: Tweak register list errors	Richard Sandiford	4	-20/+18
2023-03-30	aarch64: Make AARCH64_OPDE_REG_LIST take a bitfield	Richard Sandiford	1	-20/+34