diff options
author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:15 +0100 |
---|---|---|
committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:15 +0100 |
commit | 5f05951e4b7d0bf5fb21d61d5c52d75ec7d9e985 (patch) | |
tree | d624fc282ee1da1a575f662ba6c465e7e9da29c3 /gas | |
parent | 261f8708dbbb2c0cc1e7be7986083c6a81005b2e (diff) | |
download | binutils-5f05951e4b7d0bf5fb21d61d5c52d75ec7d9e985.zip binutils-5f05951e4b7d0bf5fb21d61d5c52d75ec7d9e985.tar.gz binutils-5f05951e4b7d0bf5fb21d61d5c52d75ec7d9e985.tar.bz2 |
aarch64: Add the SME2 CLAMP instructions
FCLAMP, SCLAMP and UCLAMP share the same format, although FCLAMP
doesn't have a .B form.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22-invalid.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22-invalid.l | 27 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22-invalid.s | 13 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22-noarch.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22-noarch.l | 111 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22.d | 119 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sme2-22.s | 131 |
7 files changed, 407 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.d b/gas/testsuite/gas/aarch64/sme2-22-invalid.d new file mode 100644 index 0000000..87213ed --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-22-invalid.s +#error_output: sme2-22-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l new file mode 100644 index 0000000..85251cd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l @@ -0,0 +1,27 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `fclamp 0,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s +[^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z3\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fclamp {z0\.h-z3\.h}, z0\.h, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fclamp {z0\.s-z3\.s}, z0\.s, z0\.s +[^ :]+:[0-9]+: Info: fclamp {z0\.d-z3\.d}, z0\.d, z0\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.q-z1\.q},z0\.q,z0\.q' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s +[^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp {z0\.h-z2\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z2\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z4\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z2\.h-z5\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z3\.h-z6\.h},z0\.h,z0\.h' diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.s b/gas/testsuite/gas/aarch64/sme2-22-invalid.s new file mode 100644 index 0000000..c284ef6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.s @@ -0,0 +1,13 @@ + fclamp 0, z0.h, z0.h + fclamp { z0.h - z1.h }, 0, z0.h + fclamp { z0.h - z1.h }, z0.h, 0 + + fclamp { z0.b - z1.b }, z0.b, z0.b + fclamp { z0.b - z3.b }, z0.b, z0.b + fclamp { z0.q - z1.q }, z0.q, z0.q + + fclamp { z0.h - z2.h }, z0.h, z0.h + fclamp { z1.h - z2.h }, z0.h, z0.h + fclamp { z1.h - z4.h }, z0.h, z0.h + fclamp { z2.h - z5.h }, z0.h, z0.h + fclamp { z3.h - z6.h }, z0.h, z0.h diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.d b/gas/testsuite/gas/aarch64/sme2-22-noarch.d new file mode 100644 index 0000000..162d84a --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme2-22.s +#error_output: sme2-22-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.l b/gas/testsuite/gas/aarch64/sme2-22-noarch.l new file mode 100644 index 0000000..f313ad0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.l @@ -0,0 +1,111 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.h-z31\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.h-z9\.h},z26\.h,z4\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.s-z31\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z18\.s-z19\.s},z9\.s,z14\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.d-z31\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z10\.d-z11\.d},z11\.d,z22\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.h-z31\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z20\.h-z23\.h},z15\.h,z17\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.s-z31\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z24\.s-z27\.s},z29\.s,z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.d-z31\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.d-z11\.d},z7\.d,z30\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.b-z31\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z2\.b-z3\.b},z21\.b,z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.h-z31\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.h-z9\.h},z26\.h,z4\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.s-z31\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z18\.s-z19\.s},z9\.s,z14\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.d-z31\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z10\.d-z11\.d},z11\.d,z22\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.b-z31\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z4\.b-z7\.b},z19\.b,z26\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.h-z31\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z20\.h-z23\.h},z15\.h,z17\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.s-z31\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z24\.s-z27\.s},z29\.s,z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.d-z31\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.d-z11\.d},z7\.d,z30\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.b-z31\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z2\.b-z3\.b},z21\.b,z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.h-z31\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.h-z9\.h},z26\.h,z4\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.s-z31\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z18\.s-z19\.s},z9\.s,z14\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.d-z31\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z10\.d-z11\.d},z11\.d,z22\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.b-z31\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z4\.b-z7\.b},z19\.b,z26\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.h-z31\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z20\.h-z23\.h},z15\.h,z17\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.s-z31\.s},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z24\.s-z27\.s},z29\.s,z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.d-z31\.d},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.d-z11\.d},z7\.d,z30\.d' diff --git a/gas/testsuite/gas/aarch64/sme2-22.d b/gas/testsuite/gas/aarch64/sme2-22.d new file mode 100644 index 0000000..1948220 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22.d @@ -0,0 +1,119 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c160c000 fclamp {z0\.h-z1\.h}, z0\.h, z0\.h +[^:]+: c160c01e fclamp {z30\.h-z31\.h}, z0\.h, z0\.h +[^:]+: c160c3e0 fclamp {z0\.h-z1\.h}, z31\.h, z0\.h +[^:]+: c17fc000 fclamp {z0\.h-z1\.h}, z0\.h, z31\.h +[^:]+: c164c348 fclamp {z8\.h-z9\.h}, z26\.h, z4\.h +[^:]+: c1a0c000 fclamp {z0\.s-z1\.s}, z0\.s, z0\.s +[^:]+: c1a0c01e fclamp {z30\.s-z31\.s}, z0\.s, z0\.s +[^:]+: c1a0c3e0 fclamp {z0\.s-z1\.s}, z31\.s, z0\.s +[^:]+: c1bfc000 fclamp {z0\.s-z1\.s}, z0\.s, z31\.s +[^:]+: c1aec132 fclamp {z18\.s-z19\.s}, z9\.s, z14\.s +[^:]+: c1e0c000 fclamp {z0\.d-z1\.d}, z0\.d, z0\.d +[^:]+: c1e0c01e fclamp {z30\.d-z31\.d}, z0\.d, z0\.d +[^:]+: c1e0c3e0 fclamp {z0\.d-z1\.d}, z31\.d, z0\.d +[^:]+: c1ffc000 fclamp {z0\.d-z1\.d}, z0\.d, z31\.d +[^:]+: c1f6c16a fclamp {z10\.d-z11\.d}, z11\.d, z22\.d +[^:]+: c160c800 fclamp {z0\.h-z3\.h}, z0\.h, z0\.h +[^:]+: c160c81c fclamp {z28\.h-z31\.h}, z0\.h, z0\.h +[^:]+: c160cbe0 fclamp {z0\.h-z3\.h}, z31\.h, z0\.h +[^:]+: c17fc800 fclamp {z0\.h-z3\.h}, z0\.h, z31\.h +[^:]+: c171c9f4 fclamp {z20\.h-z23\.h}, z15\.h, z17\.h +[^:]+: c1a0c800 fclamp {z0\.s-z3\.s}, z0\.s, z0\.s +[^:]+: c1a0c81c fclamp {z28\.s-z31\.s}, z0\.s, z0\.s +[^:]+: c1a0cbe0 fclamp {z0\.s-z3\.s}, z31\.s, z0\.s +[^:]+: c1bfc800 fclamp {z0\.s-z3\.s}, z0\.s, z31\.s +[^:]+: c1a6cbb8 fclamp {z24\.s-z27\.s}, z29\.s, z6\.s +[^:]+: c1e0c800 fclamp {z0\.d-z3\.d}, z0\.d, z0\.d +[^:]+: c1e0c81c fclamp {z28\.d-z31\.d}, z0\.d, z0\.d +[^:]+: c1e0cbe0 fclamp {z0\.d-z3\.d}, z31\.d, z0\.d +[^:]+: c1ffc800 fclamp {z0\.d-z3\.d}, z0\.d, z31\.d +[^:]+: c1fec8e8 fclamp {z8\.d-z11\.d}, z7\.d, z30\.d +[^:]+: c120c400 sclamp {z0\.b-z1\.b}, z0\.b, z0\.b +[^:]+: c120c41e sclamp {z30\.b-z31\.b}, z0\.b, z0\.b +[^:]+: c120c7e0 sclamp {z0\.b-z1\.b}, z31\.b, z0\.b +[^:]+: c13fc400 sclamp {z0\.b-z1\.b}, z0\.b, z31\.b +[^:]+: c129c6a2 sclamp {z2\.b-z3\.b}, z21\.b, z9\.b +[^:]+: c160c400 sclamp {z0\.h-z1\.h}, z0\.h, z0\.h +[^:]+: c160c41e sclamp {z30\.h-z31\.h}, z0\.h, z0\.h +[^:]+: c160c7e0 sclamp {z0\.h-z1\.h}, z31\.h, z0\.h +[^:]+: c17fc400 sclamp {z0\.h-z1\.h}, z0\.h, z31\.h +[^:]+: c164c748 sclamp {z8\.h-z9\.h}, z26\.h, z4\.h +[^:]+: c1a0c400 sclamp {z0\.s-z1\.s}, z0\.s, z0\.s +[^:]+: c1a0c41e sclamp {z30\.s-z31\.s}, z0\.s, z0\.s +[^:]+: c1a0c7e0 sclamp {z0\.s-z1\.s}, z31\.s, z0\.s +[^:]+: c1bfc400 sclamp {z0\.s-z1\.s}, z0\.s, z31\.s +[^:]+: c1aec532 sclamp {z18\.s-z19\.s}, z9\.s, z14\.s +[^:]+: c1e0c400 sclamp {z0\.d-z1\.d}, z0\.d, z0\.d +[^:]+: c1e0c41e sclamp {z30\.d-z31\.d}, z0\.d, z0\.d +[^:]+: c1e0c7e0 sclamp {z0\.d-z1\.d}, z31\.d, z0\.d +[^:]+: c1ffc400 sclamp {z0\.d-z1\.d}, z0\.d, z31\.d +[^:]+: c1f6c56a sclamp {z10\.d-z11\.d}, z11\.d, z22\.d +[^:]+: c120cc00 sclamp {z0\.b-z3\.b}, z0\.b, z0\.b +[^:]+: c120cc1c sclamp {z28\.b-z31\.b}, z0\.b, z0\.b +[^:]+: c120cfe0 sclamp {z0\.b-z3\.b}, z31\.b, z0\.b +[^:]+: c13fcc00 sclamp {z0\.b-z3\.b}, z0\.b, z31\.b +[^:]+: c13ace64 sclamp {z4\.b-z7\.b}, z19\.b, z26\.b +[^:]+: c160cc00 sclamp {z0\.h-z3\.h}, z0\.h, z0\.h +[^:]+: c160cc1c sclamp {z28\.h-z31\.h}, z0\.h, z0\.h +[^:]+: c160cfe0 sclamp {z0\.h-z3\.h}, z31\.h, z0\.h +[^:]+: c17fcc00 sclamp {z0\.h-z3\.h}, z0\.h, z31\.h +[^:]+: c171cdf4 sclamp {z20\.h-z23\.h}, z15\.h, z17\.h +[^:]+: c1a0cc00 sclamp {z0\.s-z3\.s}, z0\.s, z0\.s +[^:]+: c1a0cc1c sclamp {z28\.s-z31\.s}, z0\.s, z0\.s +[^:]+: c1a0cfe0 sclamp {z0\.s-z3\.s}, z31\.s, z0\.s +[^:]+: c1bfcc00 sclamp {z0\.s-z3\.s}, z0\.s, z31\.s +[^:]+: c1a6cfb8 sclamp {z24\.s-z27\.s}, z29\.s, z6\.s +[^:]+: c1e0cc00 sclamp {z0\.d-z3\.d}, z0\.d, z0\.d +[^:]+: c1e0cc1c sclamp {z28\.d-z31\.d}, z0\.d, z0\.d +[^:]+: c1e0cfe0 sclamp {z0\.d-z3\.d}, z31\.d, z0\.d +[^:]+: c1ffcc00 sclamp {z0\.d-z3\.d}, z0\.d, z31\.d +[^:]+: c1fecce8 sclamp {z8\.d-z11\.d}, z7\.d, z30\.d +[^:]+: c120c401 uclamp {z0\.b-z1\.b}, z0\.b, z0\.b +[^:]+: c120c41f uclamp {z30\.b-z31\.b}, z0\.b, z0\.b +[^:]+: c120c7e1 uclamp {z0\.b-z1\.b}, z31\.b, z0\.b +[^:]+: c13fc401 uclamp {z0\.b-z1\.b}, z0\.b, z31\.b +[^:]+: c129c6a3 uclamp {z2\.b-z3\.b}, z21\.b, z9\.b +[^:]+: c160c401 uclamp {z0\.h-z1\.h}, z0\.h, z0\.h +[^:]+: c160c41f uclamp {z30\.h-z31\.h}, z0\.h, z0\.h +[^:]+: c160c7e1 uclamp {z0\.h-z1\.h}, z31\.h, z0\.h +[^:]+: c17fc401 uclamp {z0\.h-z1\.h}, z0\.h, z31\.h +[^:]+: c164c749 uclamp {z8\.h-z9\.h}, z26\.h, z4\.h +[^:]+: c1a0c401 uclamp {z0\.s-z1\.s}, z0\.s, z0\.s +[^:]+: c1a0c41f uclamp {z30\.s-z31\.s}, z0\.s, z0\.s +[^:]+: c1a0c7e1 uclamp {z0\.s-z1\.s}, z31\.s, z0\.s +[^:]+: c1bfc401 uclamp {z0\.s-z1\.s}, z0\.s, z31\.s +[^:]+: c1aec533 uclamp {z18\.s-z19\.s}, z9\.s, z14\.s +[^:]+: c1e0c401 uclamp {z0\.d-z1\.d}, z0\.d, z0\.d +[^:]+: c1e0c41f uclamp {z30\.d-z31\.d}, z0\.d, z0\.d +[^:]+: c1e0c7e1 uclamp {z0\.d-z1\.d}, z31\.d, z0\.d +[^:]+: c1ffc401 uclamp {z0\.d-z1\.d}, z0\.d, z31\.d +[^:]+: c1f6c56b uclamp {z10\.d-z11\.d}, z11\.d, z22\.d +[^:]+: c120cc01 uclamp {z0\.b-z3\.b}, z0\.b, z0\.b +[^:]+: c120cc1d uclamp {z28\.b-z31\.b}, z0\.b, z0\.b +[^:]+: c120cfe1 uclamp {z0\.b-z3\.b}, z31\.b, z0\.b +[^:]+: c13fcc01 uclamp {z0\.b-z3\.b}, z0\.b, z31\.b +[^:]+: c13ace65 uclamp {z4\.b-z7\.b}, z19\.b, z26\.b +[^:]+: c160cc01 uclamp {z0\.h-z3\.h}, z0\.h, z0\.h +[^:]+: c160cc1d uclamp {z28\.h-z31\.h}, z0\.h, z0\.h +[^:]+: c160cfe1 uclamp {z0\.h-z3\.h}, z31\.h, z0\.h +[^:]+: c17fcc01 uclamp {z0\.h-z3\.h}, z0\.h, z31\.h +[^:]+: c171cdf5 uclamp {z20\.h-z23\.h}, z15\.h, z17\.h +[^:]+: c1a0cc01 uclamp {z0\.s-z3\.s}, z0\.s, z0\.s +[^:]+: c1a0cc1d uclamp {z28\.s-z31\.s}, z0\.s, z0\.s +[^:]+: c1a0cfe1 uclamp {z0\.s-z3\.s}, z31\.s, z0\.s +[^:]+: c1bfcc01 uclamp {z0\.s-z3\.s}, z0\.s, z31\.s +[^:]+: c1a6cfb9 uclamp {z24\.s-z27\.s}, z29\.s, z6\.s +[^:]+: c1e0cc01 uclamp {z0\.d-z3\.d}, z0\.d, z0\.d +[^:]+: c1e0cc1d uclamp {z28\.d-z31\.d}, z0\.d, z0\.d +[^:]+: c1e0cfe1 uclamp {z0\.d-z3\.d}, z31\.d, z0\.d +[^:]+: c1ffcc01 uclamp {z0\.d-z3\.d}, z0\.d, z31\.d +[^:]+: c1fecce9 uclamp {z8\.d-z11\.d}, z7\.d, z30\.d diff --git a/gas/testsuite/gas/aarch64/sme2-22.s b/gas/testsuite/gas/aarch64/sme2-22.s new file mode 100644 index 0000000..a209de1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-22.s @@ -0,0 +1,131 @@ + fclamp { z0.h - z1.h }, z0.h, z0.h + fclamp { z30.h - z31.h }, z0.h, z0.h + fclamp { z0.h - z1.h }, z31.h, z0.h + fclamp { z0.h - z1.h }, z0.h, z31.h + fclamp { z8.h - z9.h }, z26.h, z4.h + + fclamp { z0.s - z1.s }, z0.s, z0.s + fclamp { z30.s - z31.s }, z0.s, z0.s + fclamp { z0.s - z1.s }, z31.s, z0.s + fclamp { z0.s - z1.s }, z0.s, z31.s + fclamp { z18.s - z19.s }, z9.s, z14.s + + fclamp { z0.d - z1.d }, z0.d, z0.d + fclamp { z30.d - z31.d }, z0.d, z0.d + fclamp { z0.d - z1.d }, z31.d, z0.d + fclamp { z0.d - z1.d }, z0.d, z31.d + fclamp { z10.d - z11.d }, z11.d, z22.d + + fclamp { z0.h - z3.h }, z0.h, z0.h + fclamp { z28.h - z31.h }, z0.h, z0.h + fclamp { z0.h - z3.h }, z31.h, z0.h + fclamp { z0.h - z3.h }, z0.h, z31.h + fclamp { z20.h - z23.h }, z15.h, z17.h + + fclamp { z0.s - z3.s }, z0.s, z0.s + fclamp { z28.s - z31.s }, z0.s, z0.s + fclamp { z0.s - z3.s }, z31.s, z0.s + fclamp { z0.s - z3.s }, z0.s, z31.s + fclamp { z24.s - z27.s }, z29.s, z6.s + + fclamp { z0.d - z3.d }, z0.d, z0.d + fclamp { z28.d - z31.d }, z0.d, z0.d + fclamp { z0.d - z3.d }, z31.d, z0.d + fclamp { z0.d - z3.d }, z0.d, z31.d + fclamp { z8.d - z11.d }, z7.d, z30.d + + sclamp { z0.b - z1.b }, z0.b, z0.b + sclamp { z30.b - z31.b }, z0.b, z0.b + sclamp { z0.b - z1.b }, z31.b, z0.b + sclamp { z0.b - z1.b }, z0.b, z31.b + sclamp { z2.b - z3.b }, z21.b, z9.b + + sclamp { z0.h - z1.h }, z0.h, z0.h + sclamp { z30.h - z31.h }, z0.h, z0.h + sclamp { z0.h - z1.h }, z31.h, z0.h + sclamp { z0.h - z1.h }, z0.h, z31.h + sclamp { z8.h - z9.h }, z26.h, z4.h + + sclamp { z0.s - z1.s }, z0.s, z0.s + sclamp { z30.s - z31.s }, z0.s, z0.s + sclamp { z0.s - z1.s }, z31.s, z0.s + sclamp { z0.s - z1.s }, z0.s, z31.s + sclamp { z18.s - z19.s }, z9.s, z14.s + + sclamp { z0.d - z1.d }, z0.d, z0.d + sclamp { z30.d - z31.d }, z0.d, z0.d + sclamp { z0.d - z1.d }, z31.d, z0.d + sclamp { z0.d - z1.d }, z0.d, z31.d + sclamp { z10.d - z11.d }, z11.d, z22.d + + sclamp { z0.b - z3.b }, z0.b, z0.b + sclamp { z28.b - z31.b }, z0.b, z0.b + sclamp { z0.b - z3.b }, z31.b, z0.b + sclamp { z0.b - z3.b }, z0.b, z31.b + sclamp { z4.b - z7.b }, z19.b, z26.b + + sclamp { z0.h - z3.h }, z0.h, z0.h + sclamp { z28.h - z31.h }, z0.h, z0.h + sclamp { z0.h - z3.h }, z31.h, z0.h + sclamp { z0.h - z3.h }, z0.h, z31.h + sclamp { z20.h - z23.h }, z15.h, z17.h + + sclamp { z0.s - z3.s }, z0.s, z0.s + sclamp { z28.s - z31.s }, z0.s, z0.s + sclamp { z0.s - z3.s }, z31.s, z0.s + sclamp { z0.s - z3.s }, z0.s, z31.s + sclamp { z24.s - z27.s }, z29.s, z6.s + + sclamp { z0.d - z3.d }, z0.d, z0.d + sclamp { z28.d - z31.d }, z0.d, z0.d + sclamp { z0.d - z3.d }, z31.d, z0.d + sclamp { z0.d - z3.d }, z0.d, z31.d + sclamp { z8.d - z11.d }, z7.d, z30.d + + uclamp { z0.b - z1.b }, z0.b, z0.b + uclamp { z30.b - z31.b }, z0.b, z0.b + uclamp { z0.b - z1.b }, z31.b, z0.b + uclamp { z0.b - z1.b }, z0.b, z31.b + uclamp { z2.b - z3.b }, z21.b, z9.b + + uclamp { z0.h - z1.h }, z0.h, z0.h + uclamp { z30.h - z31.h }, z0.h, z0.h + uclamp { z0.h - z1.h }, z31.h, z0.h + uclamp { z0.h - z1.h }, z0.h, z31.h + uclamp { z8.h - z9.h }, z26.h, z4.h + + uclamp { z0.s - z1.s }, z0.s, z0.s + uclamp { z30.s - z31.s }, z0.s, z0.s + uclamp { z0.s - z1.s }, z31.s, z0.s + uclamp { z0.s - z1.s }, z0.s, z31.s + uclamp { z18.s - z19.s }, z9.s, z14.s + + uclamp { z0.d - z1.d }, z0.d, z0.d + uclamp { z30.d - z31.d }, z0.d, z0.d + uclamp { z0.d - z1.d }, z31.d, z0.d + uclamp { z0.d - z1.d }, z0.d, z31.d + uclamp { z10.d - z11.d }, z11.d, z22.d + + uclamp { z0.b - z3.b }, z0.b, z0.b + uclamp { z28.b - z31.b }, z0.b, z0.b + uclamp { z0.b - z3.b }, z31.b, z0.b + uclamp { z0.b - z3.b }, z0.b, z31.b + uclamp { z4.b - z7.b }, z19.b, z26.b + + uclamp { z0.h - z3.h }, z0.h, z0.h + uclamp { z28.h - z31.h }, z0.h, z0.h + uclamp { z0.h - z3.h }, z31.h, z0.h + uclamp { z0.h - z3.h }, z0.h, z31.h + uclamp { z20.h - z23.h }, z15.h, z17.h + + uclamp { z0.s - z3.s }, z0.s, z0.s + uclamp { z28.s - z31.s }, z0.s, z0.s + uclamp { z0.s - z3.s }, z31.s, z0.s + uclamp { z0.s - z3.s }, z0.s, z31.s + uclamp { z24.s - z27.s }, z29.s, z6.s + + uclamp { z0.d - z3.d }, z0.d, z0.d + uclamp { z28.d - z31.d }, z0.d, z0.d + uclamp { z0.d - z3.d }, z31.d, z0.d + uclamp { z0.d - z3.d }, z0.d, z31.d + uclamp { z8.d - z11.d }, z7.d, z30.d |