aarch64: Add the SME2 vertical dot-product instructions

There are three instruction formats here:
- BFVDOT + FVDOT
- SVDOT + UVDOT
- SUVDOT + USVDOT

There are also 64-bit forms of SVDOT and UVDOT.

28 files changed, 556 insertions, 0 deletions

diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.d b/gas/testsuite/gas/aarch64/sme2-18-invalid.d
new file mode 100644
index 0000000..d049bda
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-18-invalid.s
+#error_output: sme2-18-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.l b/gas/testsuite/gas/aarch64/sme2-18-invalid.l
new file mode 100644
index 0000000..6a1b77a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfvdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfvdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `fvdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `fvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fvdot za\.s\[w8,0\],{z0\.b-z1\.h},z0\.b\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	fvdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fvdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `fvdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fvdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.s b/gas/testsuite/gas/aarch64/sme2-18-invalid.s
new file mode 100644
index 0000000..efe3235
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.s
@@ -0,0 +1,20 @@
+	bfvdot	0, { z0.h - z1.h }, z0.h[0]
+	bfvdot	za.s[w8, 0], 0, z0.h[0]
+	bfvdot	za.s[w8, 0], { z0.h - z1.h }, 0
+
+	fvdot	za.h[w8, 0], z0.h, z0.h
+	fvdot	za.h[w8, 0], { z0.h - z1.h }, z0.h
+	fvdot	za.s[w8, 0], { z0.b - z1.h }, z0.b[0]
+	fvdot	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+
+	fvdot	za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+	fvdot	za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+	fvdot	za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+	fvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+	fvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+	fvdot	za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-18-noarch.d b/gas/testsuite/gas/aarch64/sme2-18-noarch.d
new file mode 100644
index 0000000..1f9fbc9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-18.s
+#error_output: sme2-18-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-18-noarch.l b/gas/testsuite/gas/aarch64/sme2-18-noarch.l
new file mode 100644
index 0000000..525e395
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-noarch.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-18.d b/gas/testsuite/gas/aarch64/sme2-18.d
new file mode 100644
index 0000000..017f275
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18.d
@@ -0,0 +1,29 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+:	c1500018 	bfvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500018 	bfvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500018 	bfvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500018 	bfvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1506018 	bfvdot	za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c150001f 	bfvdot	za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c15003d8 	bfvdot	za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c15f0018 	bfvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1500c18 	bfvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+:	c15d45da 	bfvdot	za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+:	c1500008 	fvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500008 	fvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500008 	fvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500008 	fvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1506008 	fvdot	za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c150000f 	fvdot	za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c15003c8 	fvdot	za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c15f0008 	fvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1500c08 	fvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+:	c15d45ca 	fvdot	za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
diff --git a/gas/testsuite/gas/aarch64/sme2-18.s b/gas/testsuite/gas/aarch64/sme2-18.s
new file mode 100644
index 0000000..b553b41
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18.s
@@ -0,0 +1,21 @@
+	bfvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+	bfvdot	za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+	BFVDOT	ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	BFVDOT	ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	bfvdot	za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+	bfvdot	za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+	bfvdot	za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+	bfvdot	za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+	bfvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+	bfvdot	za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+	fvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+	FVDOT	ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	FVDOT	ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	fvdot	za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+	fvdot	za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+	fvdot	za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+	fvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+	fvdot	za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.d b/gas/testsuite/gas/aarch64/sme2-19-invalid.d
new file mode 100644
index 0000000..ecc0844
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-19-invalid.s
+#error_output: sme2-19-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.l b/gas/testsuite/gas/aarch64/sme2-19-invalid.l
new file mode 100644
index 0000000..936e6f5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.l
@@ -0,0 +1,36 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `svdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `svdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `svdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `svdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `svdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	svdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.s b/gas/testsuite/gas/aarch64/sme2-19-invalid.s
new file mode 100644
index 0000000..3c97857
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.s
@@ -0,0 +1,36 @@
+	svdot	0, { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 0], 0, z0.h[0]
+	svdot	za.s[w8, 0], { z0.h - z1.h }, 0
+
+	svdot	za.h[w8, 0], z0.h, z0.h
+	svdot	za.h[w8, 0], { z0.h - z1.h }, z0.h
+
+	svdot	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+
+	svdot	za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+	svdot	za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+	svdot	za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+	svdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+	svdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+	svdot	za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
+
+	svdot	za.s[w8, 0:1], { z0.b - z3.b }, z0.h[0]
+	svdot	za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.h[0]
+
+	svdot	za.s[w7, 0], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w12, 0], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w8, -1], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w8, 8], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z0.b - z2.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z1.b - z4.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z2.b - z5.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z3.b - z6.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[-1]
+	svdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[4]
+	svdot	za.s[w8, 0], { z0.b - z3.b }, z16.b[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-19-noarch.d b/gas/testsuite/gas/aarch64/sme2-19-noarch.d
new file mode 100644
index 0000000..9006a30
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-19.s
+#error_output: sme2-19-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-19-noarch.l b/gas/testsuite/gas/aarch64/sme2-19-noarch.l
new file mode 100644
index 0000000..c4d760e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-noarch.l
@@ -0,0 +1,41 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-19.d b/gas/testsuite/gas/aarch64/sme2-19.d
new file mode 100644
index 0000000..5af3a2a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19.d
@@ -0,0 +1,49 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+:	c1500020 	svdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500020 	svdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500020 	svdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500020 	svdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1506020 	svdot	za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500027 	svdot	za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c15003e0 	svdot	za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c15f0020 	svdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1500c20 	svdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+:	c15d45e2 	svdot	za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+:	c1508020 	svdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508020 	svdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508020 	svdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508020 	svdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c150e020 	svdot	za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508027 	svdot	za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c15083a0 	svdot	za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+:	c15f8020 	svdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+:	c1508c20 	svdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+:	c15aa8a1 	svdot	za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+:	c1500030 	uvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500030 	uvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500030 	uvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500030 	uvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1506030 	uvdot	za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1500037 	uvdot	za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c15003f0 	uvdot	za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c15f0030 	uvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1500c30 	uvdot	za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+:	c15d45f2 	uvdot	za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+:	c1508030 	uvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508030 	uvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508030 	uvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508030 	uvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c150e030 	uvdot	za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508037 	uvdot	za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c15083b0 	uvdot	za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+:	c15f8030 	uvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+:	c1508c30 	uvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+:	c15aa8b1 	uvdot	za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
diff --git a/gas/testsuite/gas/aarch64/sme2-19.s b/gas/testsuite/gas/aarch64/sme2-19.s
new file mode 100644
index 0000000..d95296f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19.s
@@ -0,0 +1,43 @@
+	svdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+	SVDOT	ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	SVDOT	ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	svdot	za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+	svdot	za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+	svdot	za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+	svdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+	svdot	za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+	svdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+	SVDOT	ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+	SVDOT	ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+	svdot	za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+	svdot	za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+	svdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+	svdot	za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+	uvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+	uvdot	za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+	UVDOT	ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	UVDOT	ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	uvdot	za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+	uvdot	za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+	uvdot	za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+	uvdot	za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+	uvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+	uvdot	za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+	uvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+	uvdot	za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+	UVDOT	ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+	UVDOT	ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+	uvdot	za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+	uvdot	za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+	uvdot	za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+	uvdot	za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+	uvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+	uvdot	za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.d b/gas/testsuite/gas/aarch64/sme2-20-invalid.d
new file mode 100644
index 0000000..e769116
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-20-invalid.s
+#error_output: sme2-20-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.l b/gas/testsuite/gas/aarch64/sme2-20-invalid.l
new file mode 100644
index 0000000..cea4476
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.l
@@ -0,0 +1,27 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `suvdot 0,{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `suvdot za\.s\[w8,0\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `suvdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `suvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	suvdot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	suvdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.s b/gas/testsuite/gas/aarch64/sme2-20-invalid.s
new file mode 100644
index 0000000..9669e28
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.s
@@ -0,0 +1,23 @@
+	suvdot	0, { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, 0], 0, z0.b[0]
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, 0
+
+	suvdot	za.h[w8, 0], z0.h, z0.h
+	suvdot	za.h[w8, 0], { z0.h - z1.h }, z0.h
+	suvdot	za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+
+	suvdot	za.s[w8, 0:1], { z0.b - z3.b }, z0.h[0]
+	suvdot	za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.h[0]
+
+	suvdot	za.s[w7, 0], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w12, 0], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, -1], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, 8], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z0.b - z2.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z1.b - z4.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z2.b - z5.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z3.b - z6.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[-1]
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[4]
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, z16.b[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-20-noarch.d b/gas/testsuite/gas/aarch64/sme2-20-noarch.d
new file mode 100644
index 0000000..f73e261
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-20.s
+#error_output: sme2-20-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-20-noarch.l b/gas/testsuite/gas/aarch64/sme2-20-noarch.l
new file mode 100644
index 0000000..8b268d3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-noarch.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-20.d b/gas/testsuite/gas/aarch64/sme2-20.d
new file mode 100644
index 0000000..860152a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20.d
@@ -0,0 +1,29 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+:	c1508038 	suvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508038 	suvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508038 	suvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508038 	suvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c150e038 	suvdot	za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c150803f 	suvdot	za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c15083b8 	suvdot	za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+:	c15f8038 	suvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+:	c1508c38 	suvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+:	c15aa8b9 	suvdot	za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+:	c1508028 	usvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508028 	usvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508028 	usvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c1508028 	usvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c150e028 	usvdot	za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c150802f 	usvdot	za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+:	c15083a8 	usvdot	za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+:	c15f8028 	usvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+:	c1508c28 	usvdot	za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+:	c15aa8a9 	usvdot	za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
diff --git a/gas/testsuite/gas/aarch64/sme2-20.s b/gas/testsuite/gas/aarch64/sme2-20.s
new file mode 100644
index 0000000..bcec166
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20.s
@@ -0,0 +1,21 @@
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+	SUVDOT	ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+	SUVDOT	ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+	suvdot	za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+	suvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+	suvdot	za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+	usvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+	usvdot	za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+	USVDOT	ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+	USVDOT	ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+	usvdot	za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+	usvdot	za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+	usvdot	za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+	usvdot	za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+	usvdot	za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+	usvdot	za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d
new file mode 100644
index 0000000..6352d4b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-i16i64-4-invalid.s
+#error_output: sme2-i16i64-4-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
new file mode 100644
index 0000000..c33f15e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
@@ -0,0 +1,11 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s
new file mode 100644
index 0000000..ef98628
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s
@@ -0,0 +1,12 @@
+	svdot	za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+
+	svdot	za.d[w8, 0], { z0.h - z3.h }, z0.h[-1]
+	svdot	za.d[w8, 0], { z0.h - z3.h }, z0.h[2]
+	svdot	za.d[w8, 0], { z1.h - z4.h }, z0.h[0]
+	svdot	za.d[w8, 0], { z2.h - z5.h }, z0.h[0]
+	svdot	za.d[w8, 0], { z3.h - z6.h }, z0.h[0]
+
+	svdot	za.d[w8, 0], { z0.h - z1.h }, z0.h
+	svdot	za.d[w8, 0], { z0.h - z3.h }, z0.h
+	svdot	za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+	svdot	za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d
new file mode 100644
index 0000000..6d48f4e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-4.s
+#error_output: sme2-i16i64-4-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
new file mode 100644
index 0000000..4b27662
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4.d b/gas/testsuite/gas/aarch64/sme2-i16i64-4.d
new file mode 100644
index 0000000..441baeb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4.d
@@ -0,0 +1,29 @@
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+:	c1d08808 	svdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08808 	svdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08808 	svdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08808 	svdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0e808 	svdot	za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0880f 	svdot	za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08b88 	svdot	za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df8808 	svdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1d08c08 	svdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+:	c1daac89 	svdot	za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[1\]
+[^:]+:	c1d08818 	uvdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08818 	uvdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08818 	uvdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08818 	uvdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0e818 	uvdot	za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0881f 	uvdot	za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d08b98 	uvdot	za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df8818 	uvdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1d08c18 	uvdot	za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+:	c1daac99 	uvdot	za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[1\]
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4.s b/gas/testsuite/gas/aarch64/sme2-i16i64-4.s
new file mode 100644
index 0000000..fbddfa6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4.s
@@ -0,0 +1,21 @@
+	svdot	za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+	svdot	za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+	SVDOT	ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+	SVDOT	ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+	svdot	za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+	svdot	za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+	svdot	za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+	svdot	za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+	svdot	za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+	svdot	za.d[w9, 1], { z4.h - z7.h }, z10.h[1]
+
+	uvdot	za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+	uvdot	za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+	UVDOT	ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+	UVDOT	ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+	uvdot	za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+	uvdot	za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+	uvdot	za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+	uvdot	za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+	uvdot	za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+	uvdot	za.d[w9, 1], { z4.h - z7.h }, z10.h[1]