aarch64: Add the SME2 MLAL and MLSL instructions

The {BF,F,S,U}MLAL and {BF,F,S,U}MLSL instructions share the same
encoding.  They are the first instance of a ZA (as opposed to ZA tile)
operand having a range of offsets.  As with ZA tiles, the expected
range size is encoded in the operand-specific data field.

8 files changed, 2084 insertions, 0 deletions

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 47ad704..2aa3838 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6729,6 +6729,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	case AARCH64_OPND_SVE_Zn_INDEX:
 	case AARCH64_OPND_SME_Zm_INDEX1:
 	case AARCH64_OPND_SME_Zm_INDEX2:
+	case AARCH64_OPND_SME_Zm_INDEX3_2:
+	case AARCH64_OPND_SME_Zm_INDEX3_10:
 	case AARCH64_OPND_SME_Zn_INDEX1_16:
 	case AARCH64_OPND_SME_Zn_INDEX2_15:
 	case AARCH64_OPND_SME_Zn_INDEX2_16:
@@ -7850,8 +7852,10 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	  info->imm.value = val;
 	  break;
 
+	case AARCH64_OPND_SME_ZA_array_off2x2:
 	case AARCH64_OPND_SME_ZA_array_off3_0:
 	case AARCH64_OPND_SME_ZA_array_off3_5:
+	case AARCH64_OPND_SME_ZA_array_off3x2:
 	case AARCH64_OPND_SME_ZA_array_off4:
 	  if (!parse_dual_indexed_reg (&str, REG_TYPE_ZA,
 				       &info->indexed_za, &qualifier, 0))
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.d b/gas/testsuite/gas/aarch64/sme2-12-invalid.d
new file mode 100644
index 0000000..2ce4152
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-12-invalid.s
+#error_output: sme2-12-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.l b/gas/testsuite/gas/aarch64/sme2-12-invalid.l
new file mode 100644
index 0000000..a387bb7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.l
@@ -0,0 +1,155 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfmlal 0,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfmlal za\.s\[w8,0:1\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.s b/gas/testsuite/gas/aarch64/sme2-12-invalid.s
new file mode 100644
index 0000000..1d158ed
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.s
@@ -0,0 +1,136 @@
+	bfmlal	0, z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0:1], 0, z0.h[0]
+	bfmlal	za.s[w8, 0:1], z0.h, 0
+
+	bfmlal	za.s[w7, 0:1], z0.h, z0.h[0]
+	bfmlal	za.s[w12, 0:1], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0:0], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0:2], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 1:2], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 1:0], z0.h, z0.h[0]
+	bfmlal	za.s[w8, -2:-1], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 16:17], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0:1, vgx2], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0:1], z0.h, z16.h[0]
+	bfmlal	za.s[w8, 0:1], z0.h, z0.h[-1]
+	bfmlal	za.s[w8, 0:1], z0.h, z0.h[8]
+	bfmlal	za.s[w8, 0:1], z0.s, z0.s[0]
+	bfmlal	za.h[w8, 0:1], z0.h, z0.h[0]
+
+	bfmlal	za.s[w7, 0:1], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w12, 0:1], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:0], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:2], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 1:2], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 1:0], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, -2:-1], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 8:9], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 16:17], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z1.h - z2.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z1.h, z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z16.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[-1]
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[8]
+	bfmlal	za.s[w8, 0:1], { z0.s - z1.s }, z0.s[0]
+	bfmlal	za.h[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+
+	bfmlal	za.s[w7, 0:1], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w12, 0:1], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:0], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:2], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 1:2], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 1:0], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, -2:-1], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 8:9], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 16:17], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z1.h - z4.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z16.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[-1]
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[8]
+	bfmlal	za.s[w8, 0:1], { z0.s - z3.s }, z0.s[0]
+	bfmlal	za.h[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+
+	bfmlal	za.s[w7, 0:1], z0.h, z0.h
+	bfmlal	za.s[w12, 0:1], z0.h, z0.h
+	bfmlal	za.s[w8, 0], z0.h, z0.h
+	bfmlal	za.s[w8, 0:0], z0.h, z0.h
+	bfmlal	za.s[w8, 0:2], z0.h, z0.h
+	bfmlal	za.s[w8, 1:2], z0.h, z0.h
+	bfmlal	za.s[w8, 1:0], z0.h, z0.h
+	bfmlal	za.s[w8, -2:-1], z0.h, z0.h
+	bfmlal	za.s[w8, 16:17], z0.h, z0.h
+	bfmlal	za.s[w8, 0:1, vgx2], z0.h, z0.h
+	bfmlal	za.s[w8, 0:1], z0.h, z16.h
+	bfmlal	za.s[w8, 0:1], z0.s, z0.s
+	bfmlal	za.h[w8, 0:1], z0.h, z0.h
+
+	bfmlal	za.s[w7, 0:1], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w12, 0:1], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:0], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:2], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 1:2], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 1:0], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, -2:-1], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 8:9], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 16:17], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z1.h, z3.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z16.h
+	bfmlal	za.s[w8, 0:1], { z0.s - z1.s }, z0.s
+	bfmlal	za.h[w8, 0:1], { z0.h - z1.h }, z0.h
+
+	bfmlal	za.s[w7, 0:1], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w12, 0:1], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 0], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 0:0], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 0:2], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 1:2], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 1:0], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, -2:-1], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 8:9], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 16:17], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z16.h
+	bfmlal	za.s[w8, 0:1], { z0.s - z3.s }, z0.s
+	bfmlal	za.h[w8, 0:1], { z0.h - z3.h }, z0.h
+
+	bfmlal	za.s[w7, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w12, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, -2:-1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 1:2], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 8:9], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1], { z1.h - z2.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z15.h - z16.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z31.h, z0.h }
+
+	bfmlal	za.s[w7, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w12, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, -2:-1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 1:2], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 8:9], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z1.h - z4.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z2.h - z5.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z3.h - z6.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z15.h - z18.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z2.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z2.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z4.h }
+
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+	bfmlal	za[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.d b/gas/testsuite/gas/aarch64/sme2-12-noarch.d
new file mode 100644
index 0000000..ecaeede
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-12.s
+#error_output: sme2-12-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.l b/gas/testsuite/gas/aarch64/sme2-12-noarch.l
new file mode 100644
index 0000000..7544d1e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.l
@@ -0,0 +1,571 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z1\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h,z30\.h,z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-12.d b/gas/testsuite/gas/aarch64/sme2-12.d
new file mode 100644
index 0000000..958a1bd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12.d
@@ -0,0 +1,579 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+:	c1801010 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801010 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801010 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1807010 	bfmlal	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801017 	bfmlal	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c18013f0 	bfmlal	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c18f1010 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1809c10 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1893ab5 	bfmlal	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1901010 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901010 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901010 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901010 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1907010 	bfmlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901013 	bfmlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c19013d0 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f1010 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1901c14 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c1993656 	bfmlal	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1909010 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909010 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909010 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909010 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c190f010 	bfmlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909013 	bfmlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909390 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f9010 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1909c14 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c19ebb16 	bfmlal	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1200c10 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c10 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c10 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1206c10 	bfmlal	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c17 	bfmlal	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1200ff0 	bfmlal	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c12f0c10 	bfmlal	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1274f31 	bfmlal	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1200810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1206810 	bfmlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200813 	bfmlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200830 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z1\.h-z2\.h}, z0\.h
+[^:]+:	c1200bd0 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1200bf0 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1200bf0 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c12f0810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c12d2a52 	bfmlal	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z13\.h
+[^:]+:	c1300810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1306810 	bfmlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300813 	bfmlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1306830 	bfmlal	za\.s\[w11, 0:1, vgx4\], {z1\.h-z4\.h}, z0\.h
+[^:]+:	c1300b90 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1300bb0 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1300bb0 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1300bd0 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1300bd0 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1300bf0 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c1300bf0 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c13f0810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c13e2b12 	bfmlal	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h
+[^:]+:	c1a00810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a06810 	bfmlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00813 	bfmlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00bd0 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1be0810 	bfmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1b24ad1 	bfmlal	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1a10810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a16810 	bfmlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10813 	bfmlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10b90 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1bd0810 	bfmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1b96a12 	bfmlal	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1801018 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801018 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801018 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1807018 	bfmlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c180101f 	bfmlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c18013f8 	bfmlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c18f1018 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1809c18 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1893abd 	bfmlsl	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1901018 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901018 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901018 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901018 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1907018 	bfmlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c190101b 	bfmlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c19013d8 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f1018 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1901c1c 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c199365e 	bfmlsl	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1909018 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909018 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909018 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909018 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c190f018 	bfmlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c190901b 	bfmlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909398 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f9018 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1909c1c 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c19ebb1e 	bfmlsl	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1200c18 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c18 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c18 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1206c18 	bfmlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c1f 	bfmlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1200ff8 	bfmlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c12f0c18 	bfmlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1274f39 	bfmlsl	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1200818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1206818 	bfmlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c120081b 	bfmlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200bd8 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c12f0818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c12d2a5a 	bfmlsl	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z13\.h
+[^:]+:	c1300818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1306818 	bfmlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c130081b 	bfmlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300b98 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c13f0818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c13e2b1a 	bfmlsl	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h
+[^:]+:	c1a00818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a06818 	bfmlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a0081b 	bfmlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00bd8 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1be0818 	bfmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1b24ad9 	bfmlsl	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1a10818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a16818 	bfmlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a1081b 	bfmlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10b98 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1bd0818 	bfmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1b96a1a 	bfmlsl	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1801000 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801000 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801000 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1807000 	fmlal	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801007 	fmlal	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c18013e0 	fmlal	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c18f1000 	fmlal	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1809c00 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1893aa5 	fmlal	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1901000 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901000 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901000 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901000 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1907000 	fmlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901003 	fmlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c19013c0 	fmlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f1000 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1901c04 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c1993646 	fmlal	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1909000 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909000 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909000 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909000 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c190f000 	fmlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909003 	fmlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909380 	fmlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f9000 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1909c04 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c19ebb06 	fmlal	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1200c00 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c00 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c00 	fmlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1206c00 	fmlal	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c07 	fmlal	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1200fe0 	fmlal	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c12f0c00 	fmlal	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1274f21 	fmlal	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1200800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1206800 	fmlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200803 	fmlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200bc0 	fmlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1200be0 	fmlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1200be0 	fmlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c12f0800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c12d2a62 	fmlal	za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+:	c1300800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1306800 	fmlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300803 	fmlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300b80 	fmlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1300ba0 	fmlal	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1300bc0 	fmlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1300bc0 	fmlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1300be0 	fmlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c13f0800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c13e2b22 	fmlal	za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+:	c1a00800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a06800 	fmlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00803 	fmlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00bc0 	fmlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1be0800 	fmlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1b24ac1 	fmlal	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1a10800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a16800 	fmlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10803 	fmlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10b80 	fmlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1bd0800 	fmlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1b96a02 	fmlal	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1801008 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801008 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1801008 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1807008 	fmlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c180100f 	fmlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c18013e8 	fmlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c18f1008 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1809c08 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1893aad 	fmlsl	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1901008 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901008 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901008 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1901008 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1907008 	fmlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c190100b 	fmlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c19013c8 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f1008 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1901c0c 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c199364e 	fmlsl	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1909008 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909008 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909008 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909008 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c190f008 	fmlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c190900b 	fmlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1909388 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c19f9008 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1909c0c 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c19ebb0e 	fmlsl	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1200c08 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c08 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c08 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1206c08 	fmlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1200c0f 	fmlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1200fe8 	fmlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c12f0c08 	fmlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1274f29 	fmlsl	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1200808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1206808 	fmlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c120080b 	fmlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1200bc8 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1200be8 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1200be8 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c12f0808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c12d2a6a 	fmlsl	za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+:	c1300808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1306808 	fmlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c130080b 	fmlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1300b88 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1300ba8 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1300bc8 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1300bc8 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1300be8 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c13f0808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c13e2b2a 	fmlsl	za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+:	c1a00808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a06808 	fmlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a0080b 	fmlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1a00bc8 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1be0808 	fmlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1b24ac9 	fmlsl	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1a10808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a16808 	fmlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a1080b 	fmlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1a10b88 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1bd0808 	fmlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1b96a0a 	fmlsl	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1c01000 	smlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c07000 	smlal	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c01007 	smlal	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c013e0 	smlal	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c1cf1000 	smlal	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1c09c00 	smlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1c93aa5 	smlal	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1d01000 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d01000 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d07000 	smlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d01003 	smlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d013c0 	smlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df1000 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1d01c04 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c1d93646 	smlal	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1d09000 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09000 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0f000 	smlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09003 	smlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09380 	smlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df9000 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1d09c04 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c1debb06 	smlal	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1600c00 	smlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1606c00 	smlal	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1600c07 	smlal	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1600fe0 	smlal	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c16f0c00 	smlal	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1674f21 	smlal	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1600800 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600800 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1606800 	smlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600803 	smlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600bc0 	smlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1600be0 	smlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1600be0 	smlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c16f0800 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c16d2a62 	smlal	za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+:	c1700800 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700800 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1706800 	smlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700803 	smlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700b80 	smlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1700ba0 	smlal	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1700bc0 	smlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700bc0 	smlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700be0 	smlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c1700be0 	smlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c17f0800 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c17e2b22 	smlal	za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+:	c1e00800 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00800 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e06800 	smlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00803 	smlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00bc0 	smlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1fe0800 	smlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1f24ac1 	smlal	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1e10800 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10800 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e16800 	smlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10803 	smlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10b80 	smlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1fd0800 	smlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1f96a02 	smlal	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1c01008 	smlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c07008 	smlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c0100f 	smlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c013e8 	smlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c1cf1008 	smlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1c09c08 	smlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1c93aad 	smlsl	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1d01008 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d01008 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d07008 	smlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d0100b 	smlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d013c8 	smlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df1008 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1d01c0c 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c1d9364e 	smlsl	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1d09008 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09008 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0f008 	smlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0900b 	smlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09388 	smlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df9008 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1d09c0c 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c1debb0e 	smlsl	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1600c08 	smlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1606c08 	smlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1600c0f 	smlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1600fe8 	smlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c16f0c08 	smlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1674f29 	smlsl	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1600808 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600808 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1606808 	smlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c160080b 	smlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600bc8 	smlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1600be8 	smlsl	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1600be8 	smlsl	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c16f0808 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c16d2a6a 	smlsl	za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+:	c1700808 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700808 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1706808 	smlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c170080b 	smlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700b88 	smlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1700ba8 	smlsl	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1700bc8 	smlsl	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700bc8 	smlsl	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700be8 	smlsl	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c1700be8 	smlsl	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c17f0808 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c17e2b2a 	smlsl	za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+:	c1e00808 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00808 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e06808 	smlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e0080b 	smlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00bc8 	smlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1fe0808 	smlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1f24ac9 	smlsl	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1e10808 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10808 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e16808 	smlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e1080b 	smlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10b88 	smlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1fd0808 	smlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1f96a0a 	smlsl	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1c01010 	umlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c07010 	umlal	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c01017 	umlal	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c013f0 	umlal	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c1cf1010 	umlal	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1c09c10 	umlal	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1c93ab5 	umlal	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1d01010 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d01010 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d07010 	umlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d01013 	umlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d013d0 	umlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df1010 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1d01c14 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c1d93656 	umlal	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1d09010 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09010 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0f010 	umlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09013 	umlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09390 	umlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df9010 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1d09c14 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c1debb16 	umlal	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1600c10 	umlal	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1606c10 	umlal	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1600c17 	umlal	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1600ff0 	umlal	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c16f0c10 	umlal	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1674f31 	umlal	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1600810 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600810 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1606810 	umlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600813 	umlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600bd0 	umlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1600bf0 	umlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1600bf0 	umlal	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c16f0810 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c16d2a72 	umlal	za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+:	c1700810 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700810 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1706810 	umlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700813 	umlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700b90 	umlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1700bb0 	umlal	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1700bd0 	umlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700bd0 	umlal	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700bf0 	umlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c1700bf0 	umlal	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c17f0810 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c17e2b32 	umlal	za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+:	c1e00810 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00810 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e06810 	umlal	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00813 	umlal	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00bd0 	umlal	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1fe0810 	umlal	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1f24ad1 	umlal	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1e10810 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10810 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e16810 	umlal	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10813 	umlal	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10b90 	umlal	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1fd0810 	umlal	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1f96a12 	umlal	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+:	c1c01018 	umlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c07018 	umlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c0101f 	umlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+:	c1c013f8 	umlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+:	c1cf1018 	umlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+:	c1c09c18 	umlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+:	c1c93abd 	umlsl	za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+:	c1d01018 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d01018 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d07018 	umlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d0101b 	umlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+:	c1d013d8 	umlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df1018 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+:	c1d01c1c 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+:	c1d9365e 	umlsl	za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+:	c1d09018 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09018 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0f018 	umlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d0901b 	umlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+:	c1d09398 	umlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+:	c1df9018 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+:	c1d09c1c 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+:	c1debb1e 	umlsl	za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+:	c1600c18 	umlsl	za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+:	c1606c18 	umlsl	za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+:	c1600c1f 	umlsl	za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+:	c1600ff8 	umlsl	za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+:	c16f0c18 	umlsl	za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+:	c1674f39 	umlsl	za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+:	c1600818 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600818 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1606818 	umlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c160081b 	umlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+:	c1600bd8 	umlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+:	c1600bf8 	umlsl	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c1600bf8 	umlsl	za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+:	c16f0818 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+:	c16d2a7a 	umlsl	za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+:	c1700818 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700818 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1706818 	umlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c170081b 	umlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+:	c1700b98 	umlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+:	c1700bb8 	umlsl	za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+:	c1700bd8 	umlsl	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700bd8 	umlsl	za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+:	c1700bf8 	umlsl	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c1700bf8 	umlsl	za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+:	c17f0818 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+:	c17e2b3a 	umlsl	za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+:	c1e00818 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00818 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e06818 	umlsl	za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e0081b 	umlsl	za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+:	c1e00bd8 	umlsl	za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+:	c1fe0818 	umlsl	za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+:	c1f24ad9 	umlsl	za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+:	c1e10818 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10818 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e16818 	umlsl	za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e1081b 	umlsl	za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+:	c1e10b98 	umlsl	za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+:	c1fd0818 	umlsl	za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+:	c1f96a1a 	umlsl	za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-12.s b/gas/testsuite/gas/aarch64/sme2-12.s
new file mode 100644
index 0000000..5210e40
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12.s
@@ -0,0 +1,633 @@
+	bfmlal	za.s[w8, 0:1], z0.h, z0.h[0]
+	BFMLAL	ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+	BFMLAL	ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+	bfmlal	za.s[w11, 0:1], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 14:15], z0.h, z0.h[0]
+	bfmlal	za.s[w8, 0:1], z31.h, z0.h[0]
+	bfmlal	za.s[w8, 0:1], z0.h, z15.h[0]
+	bfmlal	za.s[w8, 0:1], z0.h, z0.h[7]
+	bfmlal	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	BFMLAL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	BFMLAL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	bfmlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	bfmlal	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	BFMLAL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+	BFMLAL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+	bfmlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	bfmlal	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	bfmlal	za.s[w8, 0:1], z0.h, z0.h
+	BFMLAL	ZA.s[W8, 0:1], Z0.h, Z0.h
+	BFMLAL	ZA.S[W8, 0:1], Z0.H, Z0.H
+	bfmlal	za.s[w11, 0:1], z0.h, z0.h
+	bfmlal	za.s[w8, 14:15], z0.h, z0.h
+	bfmlal	za.s[w8, 0:1], z31.h, z0.h
+	bfmlal	za.s[w8, 0:1], z0.h, z15.h
+	bfmlal	za.s[w10, 2:3], z25.h, z7.h
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	BFMLAL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+	BFMLAL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+	bfmlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z1.h - z2.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	bfmlal	za.s[w9, 4:5], { z18.h - z19.h }, z13.h
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	BFMLAL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+	BFMLAL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+	bfmlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	bfmlal	za.s[w11, 0:1], { z1.h - z4.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z29.h, z30.h, z31.h, z0.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	bfmlal	za.s[w9, 4:5], { z24.h - z27.h }, z14.h
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	BFMLAL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+	BFMLAL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+	bfmlal	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	bfmlal	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	BFMLAL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+	BFMLAL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+	bfmlal	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	bfmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	bfmlal	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	bfmlsl	za.s[w8, 0:1], z0.h, z0.h[0]
+	BFMLSL	ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+	BFMLSL	ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+	bfmlsl	za.s[w11, 0:1], z0.h, z0.h[0]
+	bfmlsl	za.s[w8, 14:15], z0.h, z0.h[0]
+	bfmlsl	za.s[w8, 0:1], z31.h, z0.h[0]
+	bfmlsl	za.s[w8, 0:1], z0.h, z15.h[0]
+	bfmlsl	za.s[w8, 0:1], z0.h, z0.h[7]
+	bfmlsl	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	bfmlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	BFMLSL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	BFMLSL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	bfmlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	bfmlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	bfmlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	bfmlsl	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	bfmlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	BFMLSL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+	BFMLSL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+	bfmlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	bfmlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	bfmlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	bfmlsl	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	bfmlsl	za.s[w8, 0:1], z0.h, z0.h
+	BFMLSL	ZA.s[W8, 0:1], Z0.h, Z0.h
+	BFMLSL	ZA.S[W8, 0:1], Z0.H, Z0.H
+	bfmlsl	za.s[w11, 0:1], z0.h, z0.h
+	bfmlsl	za.s[w8, 14:15], z0.h, z0.h
+	bfmlsl	za.s[w8, 0:1], z31.h, z0.h
+	bfmlsl	za.s[w8, 0:1], z0.h, z15.h
+	bfmlsl	za.s[w10, 2:3], z25.h, z7.h
+
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	bfmlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	BFMLSL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+	BFMLSL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+	bfmlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	bfmlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	bfmlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	bfmlsl	za.s[w9, 4:5], { z18.h - z19.h }, z13.h
+
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	bfmlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	BFMLSL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+	BFMLSL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+	bfmlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	bfmlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	bfmlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	bfmlsl	za.s[w9, 4:5], { z24.h - z27.h }, z14.h
+
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	BFMLSL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+	BFMLSL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+	bfmlsl	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlsl	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	bfmlsl	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	bfmlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	bfmlsl	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	BFMLSL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+	BFMLSL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+	bfmlsl	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlsl	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	bfmlsl	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	bfmlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	bfmlsl	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	fmlal	za.s[w8, 0:1], z0.h, z0.h[0]
+	FMLAL	ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+	FMLAL	ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+	fmlal	za.s[w11, 0:1], z0.h, z0.h[0]
+	fmlal	za.s[w8, 14:15], z0.h, z0.h[0]
+	fmlal	za.s[w8, 0:1], z31.h, z0.h[0]
+	fmlal	za.s[w8, 0:1], z0.h, z15.h[0]
+	fmlal	za.s[w8, 0:1], z0.h, z0.h[7]
+	fmlal	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	fmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	FMLAL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	FMLAL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	fmlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	fmlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	fmlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	fmlal	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	fmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	FMLAL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+	FMLAL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+	fmlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	fmlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	fmlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	fmlal	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	fmlal	za.s[w8, 0:1], z0.h, z0.h
+	FMLAL	ZA.s[W8, 0:1], Z0.h, Z0.h
+	FMLAL	ZA.S[W8, 0:1], Z0.H, Z0.H
+	fmlal	za.s[w11, 0:1], z0.h, z0.h
+	fmlal	za.s[w8, 14:15], z0.h, z0.h
+	fmlal	za.s[w8, 0:1], z31.h, z0.h
+	fmlal	za.s[w8, 0:1], z0.h, z15.h
+	fmlal	za.s[w10, 2:3], z25.h, z7.h
+
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	fmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	FMLAL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+	FMLAL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+	fmlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	fmlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	fmlal	za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	fmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	FMLAL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+	FMLAL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+	fmlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	fmlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	fmlal	za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	fmlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	FMLAL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+	FMLAL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+	fmlal	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	fmlal	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	fmlal	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	fmlal	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	fmlal	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	fmlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	FMLAL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+	FMLAL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+	fmlal	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	fmlal	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	fmlal	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	fmlal	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	fmlal	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	fmlsl	za.s[w8, 0:1], z0.h, z0.h[0]
+	FMLSL	ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+	FMLSL	ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+	fmlsl	za.s[w11, 0:1], z0.h, z0.h[0]
+	fmlsl	za.s[w8, 14:15], z0.h, z0.h[0]
+	fmlsl	za.s[w8, 0:1], z31.h, z0.h[0]
+	fmlsl	za.s[w8, 0:1], z0.h, z15.h[0]
+	fmlsl	za.s[w8, 0:1], z0.h, z0.h[7]
+	fmlsl	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	fmlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	FMLSL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+	FMLSL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+	fmlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	fmlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	fmlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	fmlsl	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	fmlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	FMLSL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+	FMLSL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+	fmlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	fmlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	fmlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	fmlsl	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	fmlsl	za.s[w8, 0:1], z0.h, z0.h
+	FMLSL	ZA.s[W8, 0:1], Z0.h, Z0.h
+	FMLSL	ZA.S[W8, 0:1], Z0.H, Z0.H
+	fmlsl	za.s[w11, 0:1], z0.h, z0.h
+	fmlsl	za.s[w8, 14:15], z0.h, z0.h
+	fmlsl	za.s[w8, 0:1], z31.h, z0.h
+	fmlsl	za.s[w8, 0:1], z0.h, z15.h
+	fmlsl	za.s[w10, 2:3], z25.h, z7.h
+
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	fmlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	FMLSL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+	FMLSL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+	fmlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	fmlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	fmlsl	za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	fmlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	FMLSL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+	FMLSL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+	fmlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	fmlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	fmlsl	za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	fmlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	FMLSL	ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+	FMLSL	ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+	fmlsl	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	fmlsl	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	fmlsl	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	fmlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	fmlsl	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	fmlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	FMLSL	ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+	FMLSL	ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+	fmlsl	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	fmlsl	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	fmlsl	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	fmlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	fmlsl	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	smlal	za.s[w8, 0:1], z0.h, z0.h[0]
+	smlal	za.s[w11, 0:1], z0.h, z0.h[0]
+	smlal	za.s[w8, 14:15], z0.h, z0.h[0]
+	smlal	za.s[w8, 0:1], z31.h, z0.h[0]
+	smlal	za.s[w8, 0:1], z0.h, z15.h[0]
+	smlal	za.s[w8, 0:1], z0.h, z0.h[7]
+	smlal	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	smlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	smlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	smlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	smlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	smlal	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	smlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	smlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	smlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	smlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	smlal	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	smlal	za.s[w8, 0:1], z0.h, z0.h
+	smlal	za.s[w11, 0:1], z0.h, z0.h
+	smlal	za.s[w8, 14:15], z0.h, z0.h
+	smlal	za.s[w8, 0:1], z31.h, z0.h
+	smlal	za.s[w8, 0:1], z0.h, z15.h
+	smlal	za.s[w10, 2:3], z25.h, z7.h
+
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	smlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	smlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	smlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	smlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	smlal	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	smlal	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	smlal	za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	smlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	smlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	smlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	smlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	smlal	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	smlal	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	smlal	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	smlal	za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+	smlal	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	smlal	za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	smlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	smlal	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	smlal	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	smlal	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	smlal	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	smlal	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	smlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	smlal	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	smlal	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	smlal	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	smlal	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	smlal	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	smlsl	za.s[w8, 0:1], z0.h, z0.h[0]
+	smlsl	za.s[w11, 0:1], z0.h, z0.h[0]
+	smlsl	za.s[w8, 14:15], z0.h, z0.h[0]
+	smlsl	za.s[w8, 0:1], z31.h, z0.h[0]
+	smlsl	za.s[w8, 0:1], z0.h, z15.h[0]
+	smlsl	za.s[w8, 0:1], z0.h, z0.h[7]
+	smlsl	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	smlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	smlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	smlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	smlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	smlsl	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	smlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	smlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	smlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	smlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	smlsl	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	smlsl	za.s[w8, 0:1], z0.h, z0.h
+	smlsl	za.s[w11, 0:1], z0.h, z0.h
+	smlsl	za.s[w8, 14:15], z0.h, z0.h
+	smlsl	za.s[w8, 0:1], z31.h, z0.h
+	smlsl	za.s[w8, 0:1], z0.h, z15.h
+	smlsl	za.s[w10, 2:3], z25.h, z7.h
+
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	smlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	smlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	smlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	smlsl	za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	smlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	smlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	smlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	smlsl	za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	smlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	smlsl	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	smlsl	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	smlsl	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	smlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	smlsl	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	smlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	smlsl	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	smlsl	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	smlsl	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	smlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	smlsl	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	umlal	za.s[w8, 0:1], z0.h, z0.h[0]
+	umlal	za.s[w11, 0:1], z0.h, z0.h[0]
+	umlal	za.s[w8, 14:15], z0.h, z0.h[0]
+	umlal	za.s[w8, 0:1], z31.h, z0.h[0]
+	umlal	za.s[w8, 0:1], z0.h, z15.h[0]
+	umlal	za.s[w8, 0:1], z0.h, z0.h[7]
+	umlal	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	umlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	umlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	umlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	umlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	umlal	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	umlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	umlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	umlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	umlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	umlal	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	umlal	za.s[w8, 0:1], z0.h, z0.h
+	umlal	za.s[w11, 0:1], z0.h, z0.h
+	umlal	za.s[w8, 14:15], z0.h, z0.h
+	umlal	za.s[w8, 0:1], z31.h, z0.h
+	umlal	za.s[w8, 0:1], z0.h, z15.h
+	umlal	za.s[w10, 2:3], z25.h, z7.h
+
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	umlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	umlal	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	umlal	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	umlal	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	umlal	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	umlal	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	umlal	za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	umlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	umlal	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	umlal	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	umlal	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	umlal	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	umlal	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	umlal	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	umlal	za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+	umlal	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	umlal	za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	umlal	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	umlal	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	umlal	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	umlal	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	umlal	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	umlal	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	umlal	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	umlal	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	umlal	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	umlal	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	umlal	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	umlal	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+	umlsl	za.s[w8, 0:1], z0.h, z0.h[0]
+	umlsl	za.s[w11, 0:1], z0.h, z0.h[0]
+	umlsl	za.s[w8, 14:15], z0.h, z0.h[0]
+	umlsl	za.s[w8, 0:1], z31.h, z0.h[0]
+	umlsl	za.s[w8, 0:1], z0.h, z15.h[0]
+	umlsl	za.s[w8, 0:1], z0.h, z0.h[7]
+	umlsl	za.s[w9, 10:11], z21.h, z9.h[2]
+
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+	umlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+	umlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+	umlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+	umlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+	umlsl	za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+	umlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+	umlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+	umlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+	umlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+	umlsl	za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+	umlsl	za.s[w8, 0:1], z0.h, z0.h
+	umlsl	za.s[w11, 0:1], z0.h, z0.h
+	umlsl	za.s[w8, 14:15], z0.h, z0.h
+	umlsl	za.s[w8, 0:1], z31.h, z0.h
+	umlsl	za.s[w8, 0:1], z0.h, z15.h
+	umlsl	za.s[w10, 2:3], z25.h, z7.h
+
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+	umlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+	umlsl	za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+	umlsl	za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+	umlsl	za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+	umlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+	umlsl	za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+	umlsl	za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+	umlsl	za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	umlsl	za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+	umlsl	za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+	umlsl	za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+	umlsl	za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+	umlsl	za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+	umlsl	za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	umlsl	za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+	umlsl	za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+	umlsl	za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+	umlsl	za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+	umlsl	za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+	umlsl	za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }