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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:17 +0100 |
---|---|---|
committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:17 +0100 |
commit | b368719a5abe41be68ecce97d9015f79326b37c0 (patch) | |
tree | ac05c5c6ab8d4521e79757eea73ae6afd37a4347 /gas | |
parent | d7829a28a4bb5f572e2b4108bdb450ee30bad6d2 (diff) | |
download | binutils-b368719a5abe41be68ecce97d9015f79326b37c0.zip binutils-b368719a5abe41be68ecce97d9015f79326b37c0.tar.gz binutils-b368719a5abe41be68ecce97d9015f79326b37c0.tar.bz2 |
aarch64: Add new SVE shift instructions
This patch adds the new SVE SQRSHRN, SQRSHRUN and UQRSHRN
instructions.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l | 20 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s | 14 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l | 16 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6.d | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve2-sme2-6.s | 17 |
7 files changed, 97 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d new file mode 100644 index 0000000..a40a544 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme2 +#source: sve2-sme2-6-invalid.s +#error_output: sve2-sme2-6-invalid.l diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l new file mode 100644 index 0000000..0f70210 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l @@ -0,0 +1,20 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.h,0,#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.h,{z1\.s-z2\.s},#1' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z2\.s},#1' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z3\.s},#1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#0' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#17' +[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},x0' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.h-z1\.h},#1' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z1\.s}, #1 +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z1\.d}, #1 +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.s,{z0\.d-z1\.d},#1' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z1\.d}, #1 +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z1\.s}, #1 +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqrshrn z0\.h,{z2\.s-z3\.s},#1' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s new file mode 100644 index 0000000..9c6f5ae --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s @@ -0,0 +1,14 @@ + sqrshrn 0, { z0.s - z1.s }, #1 + sqrshrn z0.h, 0, #1 + + sqrshrn z0.h, { z1.s - z2.s }, #1 + sqrshrn z0.h, { z0.s - z2.s }, #1 + sqrshrn z0.h, { z0.s - z3.s }, #1 + sqrshrn z0.h, { z0.s - z1.s }, #0 + sqrshrn z0.h, { z0.s - z1.s }, #17 + sqrshrn z0.h, { z0.s - z1.s }, x0 + + sqrshrn z0.b, { z0.h - z1.h }, #1 + sqrshrn z0.s, { z0.d - z1.d }, #1 + + movprfx z0, z4; sqrshrn z0.h, { z2.s - z3.s }, #1 diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d new file mode 100644 index 0000000..1e1c03b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sve2-sme2-6.s +#error_output: sve2-sme2-6-noarch.l diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l new file mode 100644 index 0000000..07f95d9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l @@ -0,0 +1,16 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z30\.s-z31\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z1\.h,{z26\.s-z27\.s},#14' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.h,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z30\.s-z31\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z15\.h,{z6\.s-z7\.s},#9' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z30\.s-z31\.s},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z18\.h,{z2\.s-z3\.s},#6' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6.d b/gas/testsuite/gas/aarch64/sve2-sme2-6.d new file mode 100644 index 0000000..0d6f7c1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6.d @@ -0,0 +1,24 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: 45bf2800 sqrshrn z0\.h, {z0\.s-z1\.s}, #1 +[^:]+: 45bf281f sqrshrn z31\.h, {z0\.s-z1\.s}, #1 +[^:]+: 45bf2bc0 sqrshrn z0\.h, {z30\.s-z31\.s}, #1 +[^:]+: 45b02800 sqrshrn z0\.h, {z0\.s-z1\.s}, #16 +[^:]+: 45b22b41 sqrshrn z1\.h, {z26\.s-z27\.s}, #14 +[^:]+: 45bf0800 sqrshrun z0\.h, {z0\.s-z1\.s}, #1 +[^:]+: 45bf081f sqrshrun z31\.h, {z0\.s-z1\.s}, #1 +[^:]+: 45bf0bc0 sqrshrun z0\.h, {z30\.s-z31\.s}, #1 +[^:]+: 45b00800 sqrshrun z0\.h, {z0\.s-z1\.s}, #16 +[^:]+: 45b708cf sqrshrun z15\.h, {z6\.s-z7\.s}, #9 +[^:]+: 45bf3800 uqrshrn z0\.h, {z0\.s-z1\.s}, #1 +[^:]+: 45bf381f uqrshrn z31\.h, {z0\.s-z1\.s}, #1 +[^:]+: 45bf3bc0 uqrshrn z0\.h, {z30\.s-z31\.s}, #1 +[^:]+: 45b03800 uqrshrn z0\.h, {z0\.s-z1\.s}, #16 +[^:]+: 45ba3852 uqrshrn z18\.h, {z2\.s-z3\.s}, #6 diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6.s b/gas/testsuite/gas/aarch64/sve2-sme2-6.s new file mode 100644 index 0000000..4e894df --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6.s @@ -0,0 +1,17 @@ + sqrshrn z0.h, { z0.s - z1.s }, #1 + sqrshrn z31.h, { z0.s - z1.s }, #1 + sqrshrn z0.h, { z30.s - z31.s }, #1 + sqrshrn z0.h, { z0.s - z1.s }, #16 + sqrshrn z1.h, { z26.s - z27.s }, #14 + + sqrshrun z0.h, { z0.s - z1.s }, #1 + sqrshrun z31.h, { z0.s - z1.s }, #1 + sqrshrun z0.h, { z30.s - z31.s }, #1 + sqrshrun z0.h, { z0.s - z1.s }, #16 + sqrshrun z15.h, { z6.s - z7.s }, #9 + + uqrshrn z0.h, { z0.s - z1.s }, #1 + uqrshrn z31.h, { z0.s - z1.s }, #1 + uqrshrn z0.h, { z30.s - z31.s }, #1 + uqrshrn z0.h, { z0.s - z1.s }, #16 + uqrshrn z18.h, { z2.s - z3.s }, #6 |