diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
| commit | 27f6a0bd65b92b265200392e4e9a323f626342be (patch) | |
| tree | 17fa326f9d99a6f7fa5f930e59643e3c82759d5d /gas | |
| parent | e87ff6724fe32ecff11fc36a19a09ab8fbc66c13 (diff) | |
| download | binutils-27f6a0bd65b92b265200392e4e9a323f626342be.zip binutils-27f6a0bd65b92b265200392e4e9a323f626342be.tar.gz binutils-27f6a0bd65b92b265200392e4e9a323f626342be.tar.bz2 | |
aarch64: Add the SME2 maximum/minimum instructions
This patch adds the SME2 multi-register forms of F{MAX,MIN}{,NM}
and {S,U}{MAX,MIN}. SQDMULH, SRSHL and URSHL have the same form
as SMAX etc., so the patch adds them too.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-sve2.l | 12 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-invalid.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-invalid.l | 67 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-invalid.s | 50 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-noarch.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-noarch.l | 641 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10.d | 649 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10.s | 799 |
8 files changed, 2218 insertions, 6 deletions
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l index 5f43b56..20b7a5e 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2.l +++ b/gas/testsuite/gas/aarch64/illegal-sve2.l @@ -1456,7 +1456,7 @@ [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqdmlslt z0\.s, z0\.h, z0\.h [^ :]+:[0-9]+: Info: sqdmlslt z0\.d, z0\.s, z0\.s -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.h,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.h,z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.h,z32\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `sqdmulh z0\.h,z0\.h,z8\.h\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `sqdmulh z0\.h,z0\.h,z0\.h\[8\]' @@ -1466,7 +1466,7 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.h,z0\.h,z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqdmulh z0\.h, z0\.h, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.s,z0\.s,z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.s,z0\.s,z0\.s\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.s,z32\.s,z0\.s\[0\]' [^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `sqdmulh z0\.s,z0\.s,z8\.s\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sqdmulh z0\.s,z0\.s,z0\.s\[4\]' @@ -1476,7 +1476,7 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.s,z0\.s,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqdmulh z0\.s, z0\.s, z0\.s\[0\] -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.d,z0\.d,z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.d,z0\.d,z0\.d\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.d,z32\.d,z0\.d\[0\]' [^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sqdmulh z0\.d,z0\.d,z16\.d\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sqdmulh z0\.d,z0\.d,z0\.d\[2\]' @@ -1486,7 +1486,7 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.d,z0\.d,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqdmulh z0\.d, z0\.d, z0\.d\[0\] -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.h,z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.h,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.h,z32\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sqdmulh z0\.h,z0\.b,z32\.b' [^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 3 -- `sqdmulh z0\.s,z0\.h,z0\.x' @@ -2046,7 +2046,7 @@ [^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sri z0\.s,z0\.s,#0' [^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sri z0\.s,z0\.s,#33' [^ :]+:[0-9]+: Error: immediate value out of range 1 to 64 at operand 3 -- `sri z0\.d,z0\.d,#0' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `srshl z32\.b,p0/m,z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `srshl z32\.b,p0/m,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `srshl z0\.b,p0/m,z32\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `srshl z0\.b,p0/m,z0\.b,z32\.b' [^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `srshl z0\.b,p0/m,z1\.b,z0\.b' @@ -2964,7 +2964,7 @@ [^ :]+:[0-9]+: Info: urhadd z0\.h, p0/m, z0\.h, z0\.h [^ :]+:[0-9]+: Info: urhadd z0\.s, p0/m, z0\.s, z0\.s [^ :]+:[0-9]+: Info: urhadd z0\.d, p0/m, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `urshl z32\.b,p0/m,z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `urshl z32\.b,p0/m,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `urshl z0\.b,p0/m,z32\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `urshl z0\.b,p0/m,z0\.b,z32\.b' [^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `urshl z0\.b,p0/m,z1\.b,z0\.b' diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.d b/gas/testsuite/gas/aarch64/sme2-10-invalid.d new file mode 100644 index 0000000..7b8c63f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-10-invalid.s +#error_output: sme2-10-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.l b/gas/testsuite/gas/aarch64/sme2-10-invalid.l new file mode 100644 index 0000000..d0309ba --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.l @@ -0,0 +1,67 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax {z0\.h-z1\.h},0,z0\.h' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s +[^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h,z8\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z16\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z31\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s +[^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z2\.h-z5\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h,z1\.h,z2\.h},{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z16\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z31\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s} +[^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d} +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z2\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z1\.h-z2\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z31\.h,z0\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s} +[^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d} +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z2\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z4\.h-z7\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z1\.h-z4\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z2\.h-z5\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z3\.h-z6\.h}' diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.s b/gas/testsuite/gas/aarch64/sme2-10-invalid.s new file mode 100644 index 0000000..04461bd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.s @@ -0,0 +1,50 @@ + fmax 0, { z0.h - z1.h }, z0.h + fmax { z0.h - z1.h }, 0, z0.h + fmax { z0.h - z1.h }, { z0.h - z1.h }, 0 + + fmax { z0.b - z1.b }, { z0.b - z1.b }, z0.b + fmax { z0.h - z1.h }, { z0.h - z2.h }, z0.h + fmax { z0.h - z1.h }, { z0.h - z3.h }, z0.h + fmax { z0.h - z1.h }, { z0.h, z8.h }, z0.h + fmax { z0.h - z2.h }, { z0.h - z2.h }, z0.h + fmax { z0.h - z1.h }, { z2.h - z3.h }, z0.h + fmax { z1.h - z2.h }, { z1.h - z2.h }, z0.h + fmax { z31.h, z0.h }, { z31.h, z0.h }, z0.h + fmax { z0.h - z1.h }, { z0.h - z1.h }, z16.h + fmax { z0.h - z1.h }, { z0.h - z1.h }, z31.h + + fmax { z0.b - z3.b }, { z0.b - z3.b }, z0.b + fmax { z0.h - z3.h }, { z0.h - z2.h }, z0.h + fmax { z0.h - z3.h }, { z0.h - z1.h }, z0.h + fmax { z0.h - z3.h }, { z2.h - z5.h }, z0.h + fmax { z1.h - z4.h }, { z1.h - z4.h }, z0.h + fmax { z2.h - z5.h }, { z2.h - z5.h }, z0.h + fmax { z3.h - z6.h }, { z3.h - z6.h }, z0.h + fmax { z31.h, z0.h, z1.h, z2.h }, { z31.h, z0.h, z1.h, z2.h }, z0.h + fmax { z0.h - z3.h }, { z0.h - z3.h }, z16.h + fmax { z0.h - z3.h }, { z0.h - z3.h }, z31.h + + fmax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + fmax { z0.h - z1.h }, { z0.h - z2.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z3.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z2.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z3.h } + fmax { z0.h - z2.h }, { z0.h - z2.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z2.h - z3.h }, { z0.h - z1.h } + fmax { z1.h - z2.h }, { z1.h - z2.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z1.h - z2.h } + fmax { z31.h, z0.h }, { z31.h, z0.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z31.h, z0.h } + + fmax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + fmax { z0.h - z3.h }, { z0.h - z1.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z2.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z1.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z2.h } + fmax { z0.h - z3.h }, { z4.h - z7.h }, { z0.h - z3.h } + fmax { z1.h - z4.h }, { z1.h - z4.h }, { z0.h - z3.h } + fmax { z2.h - z5.h }, { z2.h - z5.h }, { z0.h - z3.h } + fmax { z3.h - z6.h }, { z3.h - z6.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z1.h - z4.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z2.h - z5.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z3.h - z6.h } diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.d b/gas/testsuite/gas/aarch64/sme2-10-noarch.d new file mode 100644 index 0000000..159adc6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme2-10.s +#error_output: sme2-10-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.l b/gas/testsuite/gas/aarch64/sme2-10-noarch.l new file mode 100644 index 0000000..9320767 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.l @@ -0,0 +1,641 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' diff --git a/gas/testsuite/gas/aarch64/sme2-10.d b/gas/testsuite/gas/aarch64/sme2-10.d new file mode 100644 index 0000000..04535d7 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10.d @@ -0,0 +1,649 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c160a100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h +[^:]+: c160a11e fmax {z30\.h-z31\.h}, {z30\.h-z31\.h}, z0\.h +[^:]+: c16fa100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z15\.h +[^:]+: c166a106 fmax {z6\.h-z7\.h}, {z6\.h-z7\.h}, z6\.h +[^:]+: c1a0a100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s +[^:]+: c1a0a11e fmax {z30\.s-z31\.s}, {z30\.s-z31\.s}, z0\.s +[^:]+: c1afa100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z15\.s +[^:]+: c1a5a112 fmax {z18\.s-z19\.s}, {z18\.s-z19\.s}, z5\.s +[^:]+: c1e0a100 fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, 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fmax { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fmax { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fmax { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fmax { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fmax { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fmax { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fmax { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fmax { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fmax { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fmax { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fmax { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fmax { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fmax { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fmax { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fmax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fmax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fmax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fmax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fmax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fmax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fmax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fmax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fmax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fmax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fmax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fmax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fmax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fmax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fmax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fmax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fmax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fmax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fmax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fmax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, z0.h + fmaxnm { z30.h - z31.h }, { z30.h - z31.h }, z0.h + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, z15.h + fmaxnm { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, z0.s + fmaxnm { z30.s - z31.s }, { z30.s - z31.s }, z0.s + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, z15.s + fmaxnm { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, z0.d + fmaxnm { z30.d - z31.d }, { z30.d - z31.d }, z0.d + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fmaxnm { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fmaxnm { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fmaxnm { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fmaxnm { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fmaxnm { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fmaxnm { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fmaxnm { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fmaxnm { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fmaxnm { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fmaxnm { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fmaxnm { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fmaxnm { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fmaxnm { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fmaxnm { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fmaxnm { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fmaxnm { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fmaxnm { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fmaxnm { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fmaxnm { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + fmin { z0.h - z1.h }, { z0.h - z1.h }, z0.h + fmin { z30.h - z31.h }, { z30.h - z31.h }, z0.h + fmin { z0.h - z1.h }, { z0.h - z1.h }, z15.h + fmin { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + fmin { z0.s - z1.s }, { z0.s - z1.s }, z0.s + fmin { z30.s - z31.s }, { z30.s - z31.s }, z0.s + fmin { z0.s - z1.s }, { z0.s - z1.s }, z15.s + fmin { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + fmin { z0.d - z1.d }, { z0.d - z1.d }, z0.d + fmin { z30.d - z31.d }, { z30.d - z31.d }, z0.d + fmin { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fmin { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fmin { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fmin { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fmin { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fmin { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fmin { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fmin { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fmin { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fmin { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fmin { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fmin { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fmin { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fmin { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fmin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fmin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fmin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fmin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fmin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fmin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fmin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fmin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fmin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fmin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fmin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fmin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fmin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fmin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fmin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fmin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fmin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fmin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fmin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fmin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fmin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fmin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fmin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fmin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + fminnm { z0.h - z1.h }, { z0.h - z1.h }, z0.h + fminnm { z30.h - z31.h }, { z30.h - z31.h }, z0.h + fminnm { z0.h - z1.h }, { z0.h - z1.h }, z15.h + fminnm { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + fminnm { z0.s - z1.s }, { z0.s - z1.s }, z0.s + fminnm { z30.s - z31.s }, { z30.s - z31.s }, z0.s + fminnm { z0.s - z1.s }, { z0.s - z1.s }, z15.s + fminnm { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + fminnm { z0.d - z1.d }, { z0.d - z1.d }, z0.d + fminnm { z30.d - z31.d }, { z30.d - z31.d }, z0.d + fminnm { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fminnm { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fminnm { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fminnm { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fminnm { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fminnm { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fminnm { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fminnm { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fminnm { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fminnm { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fminnm { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fminnm { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fminnm { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fminnm { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fminnm { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fminnm { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fminnm { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fminnm { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fminnm { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fminnm { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fminnm { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fminnm { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fminnm { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fminnm { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fminnm { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fminnm { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fminnm { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fminnm { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fminnm { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fminnm { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fminnm { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fminnm { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fminnm { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fminnm { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fminnm { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fminnm { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fminnm { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fminnm { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + smax { z0.b - z1.b }, { z0.b - z1.b }, z0.b + smax { z30.b - z31.b }, { z30.b - z31.b }, z0.b + smax { z0.b - z1.b }, { z0.b - z1.b }, z15.b + smax { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + smax { z0.h - z1.h }, { z0.h - z1.h }, z0.h + smax { z30.h - z31.h }, { z30.h - z31.h }, z0.h + smax { z0.h - z1.h }, { z0.h - z1.h }, z15.h + smax { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + smax { z0.s - z1.s }, { z0.s - z1.s }, z0.s + smax { z30.s - z31.s }, { z30.s - z31.s }, z0.s + smax { z0.s - z1.s }, { z0.s - z1.s }, z15.s + smax { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + smax { z0.d - z1.d }, { z0.d - z1.d }, z0.d + smax { z30.d - z31.d }, { z30.d - z31.d }, z0.d + smax { z0.d - z1.d }, { z0.d - z1.d }, z15.d + smax { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + smax { z0.b - z3.b }, { z0.b - z3.b }, z0.b + smax { z28.b - z31.b }, { z28.b - z31.b }, z0.b + smax { z0.b - z3.b }, { z0.b - z3.b }, z15.b + smax { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + smax { z0.h - z3.h }, { z0.h - z3.h }, z0.h + smax { z28.h - z31.h }, { z28.h - z31.h }, z0.h + smax { z0.h - z3.h }, { z0.h - z3.h }, z15.h + smax { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + smax { z0.s - z3.s }, { z0.s - z3.s }, z0.s + smax { z28.s - z31.s }, { z28.s - z31.s }, z0.s + smax { z0.s - z3.s }, { z0.s - z3.s }, z15.s + smax { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + smax { z0.d - z3.d }, { z0.d - z3.d }, z0.d + smax { z28.d - z31.d }, { z28.d - z31.d }, z0.d + smax { z0.d - z3.d }, { z0.d - z3.d }, z15.d + smax { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + smax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + smax { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + smax { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + smax { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + smax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + smax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + smax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + smax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + smax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + smax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + smax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + smax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + smax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + smax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + smax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + smax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + smax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + smax { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + smax { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + smax { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + smax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + smax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + smax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + smax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + smax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + smax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + smax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + smax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + smax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + smax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + smax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + smax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + smin { z0.b - z1.b }, { z0.b - z1.b }, z0.b + smin { z30.b - z31.b }, { z30.b - z31.b }, z0.b + smin { z0.b - z1.b }, { z0.b - z1.b }, z15.b + smin { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + smin { z0.h - z1.h }, { z0.h - z1.h }, z0.h + smin { z30.h - z31.h }, { z30.h - z31.h }, z0.h + smin { z0.h - z1.h }, { z0.h - z1.h }, z15.h + smin { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + smin { z0.s - z1.s }, { z0.s - z1.s }, z0.s + smin { z30.s - z31.s }, { z30.s - z31.s }, z0.s + smin { z0.s - z1.s }, { z0.s - z1.s }, z15.s + smin { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + smin { z0.d - z1.d }, { z0.d - z1.d }, z0.d + smin { z30.d - z31.d }, { z30.d - z31.d }, z0.d + smin { z0.d - z1.d }, { z0.d - z1.d }, z15.d + smin { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + smin { z0.b - z3.b }, { z0.b - z3.b }, z0.b + smin { z28.b - z31.b }, { z28.b - z31.b }, z0.b + smin { z0.b - z3.b }, { z0.b - z3.b }, z15.b + smin { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + smin { z0.h - z3.h }, { z0.h - z3.h }, z0.h + smin { z28.h - z31.h }, { z28.h - z31.h }, z0.h + smin { z0.h - z3.h }, { z0.h - z3.h }, z15.h + smin { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + smin { z0.s - z3.s }, { z0.s - z3.s }, z0.s + smin { z28.s - z31.s }, { z28.s - z31.s }, z0.s + smin { z0.s - z3.s }, { z0.s - z3.s }, z15.s + smin { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + smin { z0.d - z3.d }, { z0.d - z3.d }, z0.d + smin { z28.d - z31.d }, { z28.d - z31.d }, z0.d + smin { z0.d - z3.d }, { z0.d - z3.d }, z15.d + smin { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + smin { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + smin { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + smin { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + smin { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + smin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + smin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + smin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + smin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + smin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + smin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + smin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + smin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + smin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + smin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + smin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + smin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + smin { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + smin { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + smin { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + smin { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + smin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + smin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + smin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + smin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + smin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + smin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + smin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + smin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + smin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + smin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + smin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + smin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, z0.b + sqdmulh { z30.b - z31.b }, { z30.b - z31.b }, z0.b + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, z15.b + sqdmulh { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, z0.h + sqdmulh { z30.h - z31.h }, { z30.h - z31.h }, z0.h + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, z15.h + sqdmulh { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, z0.s + sqdmulh { z30.s - z31.s }, { z30.s - z31.s }, z0.s + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, z15.s + sqdmulh { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, z0.d + sqdmulh { z30.d - z31.d }, { z30.d - z31.d }, z0.d + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, z15.d + sqdmulh { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, z0.b + sqdmulh { z28.b - z31.b }, { z28.b - z31.b }, z0.b + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, z15.b + sqdmulh { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, z0.h + sqdmulh { z28.h - z31.h }, { z28.h - z31.h }, z0.h + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, z15.h + sqdmulh { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, z0.s + sqdmulh { z28.s - z31.s }, { z28.s - z31.s }, z0.s + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, z15.s + sqdmulh { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, z0.d + sqdmulh { z28.d - z31.d }, { z28.d - z31.d }, z0.d + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, z15.d + sqdmulh { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + sqdmulh { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + sqdmulh { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + sqdmulh { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + sqdmulh { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + sqdmulh { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + sqdmulh { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + sqdmulh { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + sqdmulh { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + sqdmulh { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + sqdmulh { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + sqdmulh { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + sqdmulh { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + sqdmulh { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + sqdmulh { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + sqdmulh { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + sqdmulh { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + srshl { z0.b - z1.b }, { z0.b - z1.b }, z0.b + srshl { z30.b - z31.b }, { z30.b - z31.b }, z0.b + srshl { z0.b - z1.b }, { z0.b - z1.b }, z15.b + srshl { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + srshl { z0.h - z1.h }, { z0.h - z1.h }, z0.h + srshl { z30.h - z31.h }, { z30.h - z31.h }, z0.h + srshl { z0.h - z1.h }, { z0.h - z1.h }, z15.h + srshl { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + srshl { z0.s - z1.s }, { z0.s - z1.s }, z0.s + srshl { z30.s - z31.s }, { z30.s - z31.s }, z0.s + srshl { z0.s - z1.s }, { z0.s - z1.s }, z15.s + srshl { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + srshl { z0.d - z1.d }, { z0.d - z1.d }, z0.d + srshl { z30.d - z31.d }, { z30.d - z31.d }, z0.d + srshl { z0.d - z1.d }, { z0.d - z1.d }, z15.d + srshl { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + srshl { z0.b - z3.b }, { z0.b - z3.b }, z0.b + srshl { z28.b - z31.b }, { z28.b - z31.b }, z0.b + srshl { z0.b - z3.b }, { z0.b - z3.b }, z15.b + srshl { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + srshl { z0.h - z3.h }, { z0.h - z3.h }, z0.h + srshl { z28.h - z31.h }, { z28.h - z31.h }, z0.h + srshl { z0.h - z3.h }, { z0.h - z3.h }, z15.h + srshl { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + srshl { z0.s - z3.s }, { z0.s - z3.s }, z0.s + srshl { z28.s - z31.s }, { z28.s - z31.s }, z0.s + srshl { z0.s - z3.s }, { z0.s - z3.s }, z15.s + srshl { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + srshl { z0.d - z3.d }, { z0.d - z3.d }, z0.d + srshl { z28.d - z31.d }, { z28.d - z31.d }, z0.d + srshl { z0.d - z3.d }, { z0.d - z3.d }, z15.d + srshl { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + srshl { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + srshl { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + srshl { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + srshl { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + srshl { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + srshl { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + srshl { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + srshl { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + srshl { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + srshl { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + srshl { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + srshl { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + srshl { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + srshl { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + srshl { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + srshl { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + srshl { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + srshl { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + srshl { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + srshl { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + srshl { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + srshl { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + srshl { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + srshl { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + srshl { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + srshl { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + srshl { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + srshl { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + srshl { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + srshl { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + srshl { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + srshl { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + umax { z0.b - z1.b }, { z0.b - z1.b }, z0.b + umax { z30.b - z31.b }, { z30.b - z31.b }, z0.b + umax { z0.b - z1.b }, { z0.b - z1.b }, z15.b + umax { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + umax { z0.h - z1.h }, { z0.h - z1.h }, z0.h + umax { z30.h - z31.h }, { z30.h - z31.h }, z0.h + umax { z0.h - z1.h }, { z0.h - z1.h }, z15.h + umax { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + umax { z0.s - z1.s }, { z0.s - z1.s }, z0.s + umax { z30.s - z31.s }, { z30.s - z31.s }, z0.s + umax { z0.s - z1.s }, { z0.s - z1.s }, z15.s + umax { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + umax { z0.d - z1.d }, { z0.d - z1.d }, z0.d + umax { z30.d - z31.d }, { z30.d - z31.d }, z0.d + umax { z0.d - z1.d }, { z0.d - z1.d }, z15.d + umax { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + umax { z0.b - z3.b }, { z0.b - z3.b }, z0.b + umax { z28.b - z31.b }, { z28.b - z31.b }, z0.b + umax { z0.b - z3.b }, { z0.b - z3.b }, z15.b + umax { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + umax { z0.h - z3.h }, { z0.h - z3.h }, z0.h + umax { z28.h - z31.h }, { z28.h - z31.h }, z0.h + umax { z0.h - z3.h }, { z0.h - z3.h }, z15.h + umax { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + umax { z0.s - z3.s }, { z0.s - z3.s }, z0.s + umax { z28.s - z31.s }, { z28.s - z31.s }, z0.s + umax { z0.s - z3.s }, { z0.s - z3.s }, z15.s + umax { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + umax { z0.d - z3.d }, { z0.d - z3.d }, z0.d + umax { z28.d - z31.d }, { z28.d - z31.d }, z0.d + umax { z0.d - z3.d }, { z0.d - z3.d }, z15.d + umax { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + umax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + umax { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + umax { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + umax { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + umax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + umax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + umax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + umax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + umax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + umax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + umax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + umax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + umax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + umax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + umax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + umax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + umax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + umax { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + umax { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + umax { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + umax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + umax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + umax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + umax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + umax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + umax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + umax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + umax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + umax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + umax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + umax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + umax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + umin { z0.b - z1.b }, { z0.b - z1.b }, z0.b + umin { z30.b - z31.b }, { z30.b - z31.b }, z0.b + umin { z0.b - z1.b }, { z0.b - z1.b }, z15.b + umin { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + umin { z0.h - z1.h }, { z0.h - z1.h }, z0.h + umin { z30.h - z31.h }, { z30.h - z31.h }, z0.h + umin { z0.h - z1.h }, { z0.h - z1.h }, z15.h + umin { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + umin { z0.s - z1.s }, { z0.s - z1.s }, z0.s + umin { z30.s - z31.s }, { z30.s - z31.s }, z0.s + umin { z0.s - z1.s }, { z0.s - z1.s }, z15.s + umin { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + umin { z0.d - z1.d }, { z0.d - z1.d }, z0.d + umin { z30.d - z31.d }, { z30.d - z31.d }, z0.d + umin { z0.d - z1.d }, { z0.d - z1.d }, z15.d + umin { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + umin { z0.b - z3.b }, { z0.b - z3.b }, z0.b + umin { z28.b - z31.b }, { z28.b - z31.b }, z0.b + umin { z0.b - z3.b }, { z0.b - z3.b }, z15.b + umin { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + umin { z0.h - z3.h }, { z0.h - z3.h }, z0.h + umin { z28.h - z31.h }, { z28.h - z31.h }, z0.h + umin { z0.h - z3.h }, { z0.h - z3.h }, z15.h + umin { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + umin { z0.s - z3.s }, { z0.s - z3.s }, z0.s + umin { z28.s - z31.s }, { z28.s - z31.s }, z0.s + umin { z0.s - z3.s }, { z0.s - z3.s }, z15.s + umin { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + umin { z0.d - z3.d }, { z0.d - z3.d }, z0.d + umin { z28.d - z31.d }, { z28.d - z31.d }, z0.d + umin { z0.d - z3.d }, { z0.d - z3.d }, z15.d + umin { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + umin { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + umin { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + umin { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + umin { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + umin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + umin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + umin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + umin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + umin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + umin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + umin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + umin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + umin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + umin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + umin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + umin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + umin { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + umin { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + umin { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + umin { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + umin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + umin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + umin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + umin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + umin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + umin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + umin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + umin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + umin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + umin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + umin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + umin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + urshl { z0.b - z1.b }, { z0.b - z1.b }, z0.b + urshl { z30.b - z31.b }, { z30.b - z31.b }, z0.b + urshl { z0.b - z1.b }, { z0.b - z1.b }, z15.b + urshl { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + urshl { z0.h - z1.h }, { z0.h - z1.h }, z0.h + urshl { z30.h - z31.h }, { z30.h - z31.h }, z0.h + urshl { z0.h - z1.h }, { z0.h - z1.h }, z15.h + urshl { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + urshl { z0.s - z1.s }, { z0.s - z1.s }, z0.s + urshl { z30.s - z31.s }, { z30.s - z31.s }, z0.s + urshl { z0.s - z1.s }, { z0.s - z1.s }, z15.s + urshl { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + urshl { z0.d - z1.d }, { z0.d - z1.d }, z0.d + urshl { z30.d - z31.d }, { z30.d - z31.d }, z0.d + urshl { z0.d - z1.d }, { z0.d - z1.d }, z15.d + urshl { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + urshl { z0.b - z3.b }, { z0.b - z3.b }, z0.b + urshl { z28.b - z31.b }, { z28.b - z31.b }, z0.b + urshl { z0.b - z3.b }, { z0.b - z3.b }, z15.b + urshl { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + urshl { z0.h - z3.h }, { z0.h - z3.h }, z0.h + urshl { z28.h - z31.h }, { z28.h - z31.h }, z0.h + urshl { z0.h - z3.h }, { z0.h - z3.h }, z15.h + urshl { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + urshl { z0.s - z3.s }, { z0.s - z3.s }, z0.s + urshl { z28.s - z31.s }, { z28.s - z31.s }, z0.s + urshl { z0.s - z3.s }, { z0.s - z3.s }, z15.s + urshl { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + urshl { z0.d - z3.d }, { z0.d - z3.d }, z0.d + urshl { z28.d - z31.d }, { z28.d - z31.d }, z0.d + urshl { z0.d - z3.d }, { z0.d - z3.d }, z15.d + urshl { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + urshl { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + urshl { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + urshl { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + urshl { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + urshl { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + urshl { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + urshl { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + urshl { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + urshl { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + urshl { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + urshl { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + urshl { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + urshl { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + urshl { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + urshl { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + urshl { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + urshl { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + urshl { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + urshl { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + urshl { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + urshl { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + urshl { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + urshl { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + urshl { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + urshl { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + urshl { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + urshl { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + urshl { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + urshl { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + urshl { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + urshl { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + urshl { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } |