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path: root/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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10 days[AArch64] Remove post-decoding instruction mutations (#156364)Sergei Barannikov1-47/+57
2025-09-10[AArch64] Use SignExtend64<N> (NFC) (#157788)Kazu Hirata1-38/+8
2025-09-05[AArch64] Provide a custom decoder for LDR_ZA/STR_ZA (#156363)Sergei Barannikov1-10/+19
2025-08-27[NFC][MC][AArch64] Rearrange decode functions in AArch64 disassembler (#154990)Rahul Joshi1-294/+117
2025-08-21[NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file ...Rahul Joshi1-0/+2
2025-06-17[llvm] annotate interfaces in llvm/Target for DLL export (#143615)Andrew Rogers1-1/+2
2025-03-20[MC] Return MCRegister from MCRegisterClass::getRegister. NFC (#132126)Craig Topper1-8/+8
2025-03-03[BOLT][AArch64] Add symbolizer for AArch64 disassembler. NFCI (#127969)Maksim Panchenko1-1/+4
2024-11-11[AArch64] Remove unused includes (NFC) (#115685)Kazu Hirata1-3/+0
2024-10-23[LLVM][AArch64]Add assembly/disassembly for compare-and-branch instr… (#11...CarolineConcatto1-0/+17
2024-10-23[LLVM][AArch64] Add assembly/disassembly for FTMOPA and BFTMOPA (#113230)SpencerAbson1-0/+13
2024-10-22[LLVM][MC][AArch64] Assembler support for Armv9.6-A memory systems extensions...Nashe Mncube1-0/+24
2024-10-22Revert "[LLVM][AArch64]Add assembly/disassembly for compare-and-branch instr...Caroline Concatto1-17/+0
2024-10-22[LLVM][AArch64]Add assembly/disassembly for compare-and-branch instructions ...CarolineConcatto1-0/+17
2024-10-21[NFC] Fix -WError for unused Encode/Decode ZK methodsSpencer Abson1-18/+0
2024-10-21[LLVM][AArch64] Add register classes for Armv9.6 assembly (#111717)SpencerAbson1-2/+41
2024-07-15[NFC] [AArch64] Refactor predicate register class decode functions (#97412)Max Beck-Jones1-595/+233
2024-04-09[AArch64] Remove copy in SVE/SME predicate spill and fill (#81716)Sam Tebbs1-0/+15
2024-01-01[AArch64] Fix a always true condition warning. NFCDavid Green1-1/+1
2023-12-21Re-land "[AArch64] Add FEAT_PAuthLR assembler support" (#75947)Tomas Matheson1-0/+18
2023-12-21Revert "[AArch64] Add FEAT_PAuthLR assembler support"Tomas Matheson1-18/+0
2023-12-21[AArch64] Add FEAT_PAuthLR assembler supportOliver Stannard1-0/+18
2023-11-01[llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (#70134)hassnaaHamdi1-0/+11
2023-09-21[AArch64] Separate PNR into its own Register Class (#65306)Matthew Devereau1-3/+18
2023-05-09[AArch64] Remove global constructors from AArch64Disassembler.cpp.Craig Topper1-11/+10
2023-01-23[MC] Make more use of MCInstrDesc::operands. NFC.Jay Foad1-3/+3
2022-12-19[AArch64] Add new v9.4-A PM pstate system registerLucas Prates1-14/+39
2022-11-30[AArch64] Assembly support for VMSATomas Matheson1-0/+23
2022-11-22[AArch64][clang] implement 2022 General Data-Processing instructionsTies Stuij1-0/+37
2022-11-10[AArch64]SME2 Multi vector Sel Load and Store instructionsCaroline Concatto1-0/+30
2022-11-03[AArch64]SME2 instructions that use ZTO operandCaroline Concatto1-0/+3
2022-11-02[AArch64][SVE2] Add the SVE2.1 while & pext predicate pair instructionsDavid Sherwood1-0/+29
2022-10-28[llvm-tblgen] NFC: Simplify DecoderEmitter.James Y Knight1-15/+0
2022-10-27[AArch64][SVE2] Add the SVE2.1 pext and ptrue predicate-as-counter instructionsDavid Sherwood1-0/+13
2022-10-20[AArch64]SME2 Multiple vector ternary int/float 2 and 4 registersCaroline Concatto1-0/+28
2022-10-19[AArch64] SME2 Single-multi vector ternary int/FP 2 and 4 registersCaroline Concatto1-0/+16
2022-08-13[llvm] Qualify auto in range-based for loops (NFC)Kazu Hirata1-1/+1
2022-08-08[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFCFangrui Song1-8/+8
2022-07-26[MC,llvm-objdump,ARM] Target-dependent disassembly resync policy.Simon Tatham1-0/+8
2022-05-25[MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand()Maksim Panchenko1-6/+6
2022-05-20[AArch64][SME][NFC] Add implicit operands for SME instructions in the disasse...Caroline Concatto1-58/+30
2022-05-15Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`Sheng1-1/+1
2022-03-25[Disassember][NFCI] Use strong type for instruction decoderMaksim Panchenko1-237/+253
2022-01-06Ensure newlines at the end of files (NFC)Kazu Hirata1-1/+1
2022-01-05[AArch64] Adding "armv8.8-a" memcpy/memset support.Simon Tatham1-0/+55
2021-10-08Move TargetRegistry.(h|cpp) from Support to MCReid Kleckner1-1/+1
2021-10-07[AArch64][SME] Update tile slice index offsetCullen Rhodes1-0/+16
2021-09-03[AArch64][SME] Support NEON vector to GPR integer moves in streaming modeCullen Rhodes1-0/+11
2021-08-12[AArch64] NFC: Remove register decoder tables in disassemblerCullen Rhodes1-250/+49
2021-08-09[AArch64] NFC: Remove DecodeVectorRegisterClass from disassemblerCullen Rhodes1-24/+3
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