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99 min.[Analysis] Add Intrinsics::CLMUL case to cost calculations to getIntrinsicIns...HEADmainniqiangpro-cell1-0/+3
2 hoursRevert "[VPlan] Detect and create partial reductions in VPlan. (NFCI) (#167851)"Martin Storsjö9-441/+368
3 hours[VPlan] Rename VectorEndPointer's IndexedTy to SourceElementTy (NFC) (#178856)Ramkumar Ramachandra2-11/+12
18 hours[VPlan] Split up attachCheckBlock in distinct helpers for re-use (NFC).Florian Hahn1-25/+33
19 hours[VPlan] Detect and create partial reductions in VPlan. (NFCI) (#167851)Florian Hahn9-368/+441
20 hours[AMDGPU] Introduce custom MIR formatting for s_wait_alu (#176316)vporpo7-16/+201
21 hours[M68k] Prevent folding of loads + stores when it would introduce new chain de...knickish3-6/+128
22 hours[RISCV] Simplify how RVVConstraints are declared in tablegen. NFC (#178972)Craig Topper2-29/+17
29 hours[perf] Replace copy-assign by move-assign in llvm/lib/DWARFCFIChecker… (#17...serge-sans-paille2-2/+2
36 hours[MC/DC] Make covmap tolerant of nested Decisions (#125407)NAKAMURA Takumi1-168/+135
36 hours[VectorCombine] Fix the PtrAdd offset in shrinkLoadForShuffles to account for...Deric C.1-4/+6
37 hours[msan] Support Arm NEON usdot (#178982)Thurston Dang1-2/+3
38 hours[SPIRV][NFC] Merge Subgroup Reduce into uniform selector (#178802)Farzon Lotfi1-51/+39
38 hours[AMDGPU][SIInsertWaitcnts][NFC] Use loop to set Wait entries (#178764)vporpo1-26/+7
40 hours[SelectionDAGISel] Avoid unnecessary MatchScope copy. NFC (#178957)Craig Topper1-2/+1
41 hours[RISCV] Rename ConstraintMask->RVVConstraintMask. NFC (#178963)Craig Topper2-7/+7
41 hoursAttributor: Use anchor scope for SimplifyQuery context (#178958)Matt Arsenault1-1/+1
41 hours[AArch64] Convert CLS intrinsics to use ISD::CTLS (#178885)Hamza Hassanain2-1/+10
42 hours[SystemZ] Bugfix: Add VLR16 to SystemZInstrInfo::copyPhysReg(). (#178932)Jonas Paulsson8-5/+9
42 hours[ThinLTO] Stop attempting variable import once we see a non-variable (#178944)Teresa Johnson1-2/+12
43 hours[WebAssembly] Prevent FastISel from trying to select funcref calls (#178742)Demetrius Kanios1-0/+6
43 hours[RISCV] Remove redundant FeatureStdExtZcd from X100. (#178928)Craig Topper1-1/+0
43 hours[SelectionDAG] Handle undef at any position in isConstantSequence (#176671)Philip Ginsbach-Chen1-14/+47
43 hoursReapply "[VPlan] Add hidden `-vplan-print-after-all` option" (#178547)Andrei Elovikov5-70/+93
43 hours[VectorCombine] Fix crash with poison mask elements in shrinkLoadForShuffles ...puneeth_aditya_56561-0/+5
43 hours[ThinLTO] Clear read/write only flags when referencing function summary (#178...Teresa Johnson1-2/+27
44 hours[LoopUnrollPass] Add comment explaining the use of `UP.DefaultUnrollRuntimeCo...Justin Fargnoli1-0/+2
44 hours[SelectionDAGISel] Use size_t for MatcherIndex. NFC (#178828)Craig Topper1-24/+24
44 hours[SLP][NFC] Refactor vectorizeStores::RangeSizes (#177241)Ryan Buchner1-38/+30
44 hours[LoopUnrollPass] Fix spelling mistake in `computeUnrollCount` description (NF...Justin Fargnoli1-1/+1
44 hours[LoopUnrollPass] Remove unhelpful comment in `shouldPragmaUnroll` (NFC) (#178...Justin Fargnoli1-1/+0
44 hours[RISC-V][Mach-O] Use RISCV_RELOC_ADDEND for large pc-relative offset. (#178699)Francesco Petrogalli1-8/+22
44 hours[AsmPrinter] Add a command-line option to emit stack usage files (#178908)Marina Taylor1-1/+8
45 hours[RegAlloc] Remove redundant parameters for weightCalcHelper (NFC). (#170151)hstk30-hw1-35/+3
45 hours[DAG] Reland: Enable bitcast STLF for Constant/Undef (#178890)陈子昂1-3/+26
45 hours[X86] Truncate unused bit for blendw mask (#178883)Mahesh-Attarde1-1/+2
46 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_s_sleep (#178838)vangthao951-0/+2
46 hours[AMDGPU][SIInsertWaitcnts][NFC] Introduce WaitEventSet container for events (...vporpo1-65/+149
46 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for fma_legacy (#178759)vangthao951-0/+4
46 hours[SLP]Cast incoming value to a propr type for int nodes, bitcasted to fpAlexey Bataev1-0/+7
46 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_prng_b32 (#178741)vangthao951-0/+4
46 hours[perf] Replace copy-assign by move-assign in llvm/lib/MC/* (#178176)serge-sans-paille1-1/+1
46 hours[AMDGPU][Scheduler] Make `finalizeGCNRegion` an overridable hook (NFC) (#177199)Lucas Ramirez2-7/+5
46 hoursRevert "[InstCombine] Always fold alignment assumptions into operand bundles ...Nico Weber1-1/+2
46 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_wwm/strict_wwm (#17...vangthao951-0/+14
46 hoursInstCombine: Handle multiple use copysign (#176917)Matt Arsenault1-6/+38
46 hours[VPlan] Mark VPActiveLaneMaskPHIRecipe as readnone. (#177886)Florian Hahn1-0/+2
47 hours[VectorCombine] Trim low end of loads used in shufflevector rebroadcasts. (#1...Leon Clark1-8/+18
47 hours[AMDGPU] Fix VOPD checks for commuting OpX and OpY (#178772)Joe Nash2-36/+48
48 hoursNFC: Rename CodeGenOptions::StackUsageOutput to StackUsageFile (#178898)Marina Taylor1-1/+1
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