riscv-gnu-toolchain/llvm.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2026-02-12	[AArch64][llvm] Allow FPRCVT insns to run in streaming mode if safe (#177334)	Jonathan Thackray	2	-2/+5
2026-02-12	[AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (#177333)	Jonathan Thackray	1	-1/+7
2026-02-12	[AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (#178876)	Matthew Devereau	2	-2/+16
2026-02-12	[AArch64] Eliminate XTN/SSHLL for vector splats (#180913)	Guy David	1	-0/+65
2026-02-12	[AArch64]Add SCR2_EL3 system register (#180918)	CarolineConcatto	1	-0/+4
2026-02-12	[AArch64][ISel] Add clmul to pmullb/t lowering (#180568)	Matthew Devereau	2	-1/+12
2026-02-12	Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (#180954)	sstipano	1	-4/+4
2026-02-11	[NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (#180311)	Florian Mayer	1	-2/+1
2026-02-11	[AArch64] Lower factor-of-2 interleaved stores to STNP (#177938)	Tomer Shafir	3	-4/+63
2026-02-11	[AArch64] Avoid selecting XAR for reverse operations. (#178706)	Ricardo Jesus	1	-0/+100
2026-02-10	[LV] Handle partial sub-reductions with sub in middle block. (#178919)	Sander de Smalen	1	-0/+5
2026-02-10	[AArch64] Add support for intent to read prefetch intrinsic (#179709)	Kerry McLaughlin	3	-0/+12
2026-02-09	[win][aarch64] The Windows Control Flow Guard Check function also preserves X...	Daniel Paoliello	1	-2/+5
2026-02-09	[AArch64] Inline asm v0-v31 are scalar when having less than 64-bit capacity ...	Alexey Merzlyakov	1	-4/+22
2026-02-09	[AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (#180535)	John Brawn	2	-0/+24
2026-02-09	[AArch64] Tweak fixed-length loop.dependence.mask costs (#175538)	Benjamin Maxwell	1	-3/+5
2026-02-09	[SelectionDAGBuilder] Remove NoNaNsFPMath uses (#169904)	paperchalice	2	-5/+7
2026-02-06	Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321)	Vladimir Vereschaka	1	-4/+4
2026-02-06	[MC][TableGen] Expand Opcode field of MCInstrDesc (#179652)	sstipano	1	-4/+4
2026-02-06	[AArch64] Correct spelling of INSERT_SUBREF->INSERT_SUBREG. NFC	David Green	1	-1/+1
2026-02-06	[AArch64][SDAG] Legalise BSWAP for Neon types. (#179702)	Ricardo Jesus	1	-1/+5
2026-02-06	[AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (#179909)	Sander de Smalen	3	-41/+38
2026-02-05	[AArch64][GlobalISel] Add GISel handling for FCVT fixed. (#178903)	David Green	4	-32/+113
2026-02-05	[AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neove...	David Green	1	-0/+2
2026-02-05	[NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (#170521)	Paul Walker	1	-7/+11
2026-02-05	[AArch64] Use brk{a,b} for a lane mask from cttz.elts (#178674)	Graham Hunter	1	-0/+41
2026-02-05	[AArch64][SME] Add missing ZT0 transition (#179193)	Benjamin Maxwell	1	-0/+1
2026-02-04	[RegAlloc] Change the computation of CSRCost (#177226)	weiguozhi	1	-1/+5
2026-02-04	[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)	Jay Foad	11	-212/+173
2026-02-04	[AArch64] Fix a couple of typos (NFC) (#179639)	Benjamin Maxwell	1	-7/+7
2026-02-04	[NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (#179501)	Juan Manuel Martinez Caamaño	1	-22/+44
2026-02-03	[CodeGen][AArch64] ptrauth intrinsic to safely construct relative ptr (#142047)	Abhay Kanhere	4	-18/+174
2026-02-03	[AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (#173999)	Anatoly Trosinenko	1	-1/+12
2026-02-03	[AArch64][SME] Limit where SME ABI optimizations apply (#179273)	Benjamin Maxwell	1	-150/+18
2026-02-03	[AArch64] Fix cttz.elts codegen for fixed-length vectors (#178902)	Graham Hunter	3	-31/+36
2026-02-02	[CodeGen] Refactor targets to override the new getTgtMemIntrinsic overload (N...	Nicolai Hähnle	2	-24/+38
2026-02-02	[AArch64] Move the existing fcvt fixed point selection to tblgen. (#178603)	David Green	4	-97/+135
2026-02-02	[SelectionDAG][NFC] Rename isConstantSequence to isArithmeticSequence (#179108)	Philip Ginsbach-Chen	1	-2/+2
2026-02-02	[IR] Remove Before argument from splitBlock APIs (NFC) (#179195)	Nikita Popov	1	-1/+1
2026-02-02	[AArch64] Support SHUFFLE of ANY_EXTEND in performBuildShuffleExtendCombine (...	Hari Limaye	1	-3/+4
2026-02-02	[AArch64][GlobalISel] Do no skip zext in getTestBitReg. (#177991)	David Green	1	-1/+5
2026-02-01	[SDAG] Check for `nsz` in DAG.canIgnoreSignBitOfZero() (#178905)	Benjamin Maxwell	1	-2/+1
2026-01-30	[AArch64] Convert CLS intrinsics to use ISD::CTLS (#178885)	Hamza Hassanain	2	-1/+10
2026-01-30	[AArch64] Fix sign-extend-inreg combine for i1 types (#177976)	Sander de Smalen	1	-3/+3
2026-01-30	[AArch64] Add FCVT fixed patterns for fptoi(fadd(a, a)) (#178536)	David Green	1	-3/+28
2026-01-30	[Darwin][MTE] bugfix: Only instrument stack history buffer if there are instr...	Usama Hameed	1	-1/+4
2026-01-29	[NFC] [MTE] Factor out getSlotPtr (#178755)	Florian Mayer	1	-14/+18
2026-01-29	[AArch64] Optimize memset to use NEON DUP instruction for more sizes (#166030)	Osama Abdelkader	2	-10/+108
2026-01-29	[AArch64] Use GISel for optnone functions (#174746)	Ryan Cowan	3	-9/+57
2026-01-29	[AArch64][SME2] Allow lowering to whilelo.x2 in non-streaming mode (#178399)	Kerry McLaughlin	1	-5/+6