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3 hours[msan][NFCI] Add test for switch() (#179775)HEADmainThurston Dang1-0/+120
4 hours[llvm-profgen] Fix PDB dependency (#179830)Haohai Wen1-0/+1
4 hoursgn build: Generate dynamic lists for ubsan.Peter Collingbourne2-1/+58
4 hoursgn build: Use llvm-nm instead of nm to generate version script.Peter Collingbourne1-1/+3
4 hours[SROA] Avoid redundant `.oldload` generation when `memset` fully covers a par...int-zjt3-13/+9
5 hours[llvm-profgen] Support loading symbols from symtab for COFF (#179175)Haohai Wen4-17/+50
5 hours[msan][NFCI] Remove redundant tests from aarch64-bf16-dotprod-intrinsics.ll (...Thurston Dang1-299/+3
5 hours[msan] Add intermediate verbosity instruction dump (#178771)Thurston Dang1-0/+40
6 hoursReland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#1...Akshay Deodhar14-1053/+9549
7 hours[SLP][NFC]Add another test for shl-to-add transformation, NFCAlexey Bataev1-0/+57
8 hours[LV] Make sure DFS numbers are valid before use.Florian Hahn1-0/+1
8 hoursworkflows/release-binaries: Add support for Windows ARM builds (#177609)Tom Stellard2-81/+116
8 hours[CodeGen][TII] Delete analyzeSelect hook (#175828)Sam Elliott8-122/+5
8 hours[MLGO] Ensure cmd_filter is marked Optional (#179781)Aiden Grossman1-2/+2
8 hours[LV] Use DomTree DFS numbers to sort early exit blocks.Florian Hahn2-1/+32
9 hours[RISCV] Deprecate RISCVSubtarget::hasStdExtCOrZcd() and hasStdExtCOrZcfOrZce(...Craig Topper8-64/+57
10 hours[AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (#175845)Nicolai Hähnle4-63/+66
10 hours[UTC] Add initial VPlan support. (#178534)Florian Hahn6-655/+922
10 hours[SelectionDAG] Add expansion for llvm.modf intrinsic (#179434)Alex Wang3-0/+724
10 hours[Triple] Make a target triple "os" for firmware (#176272)Ian Anderson3-2/+47
10 hoursSupport: allow `llvm::sys::fs::rename` to rename a directory on Windows (#179...Saleem Abdulrasool1-1/+3
11 hours[Hexagon] Fix use-after-poison in balanceSubTree (#179239)Brian Cain2-19/+91
11 hoursRevert "[lit] Avoid multiprocessing for -j1 runs (#175587)"Aiden Grossman3-111/+0
11 hours[lit] Avoid multiprocessing for -j1 runs (#175587)alx323-0/+111
11 hours[AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (#178949)vporpo1-11/+15
12 hours[AMDGPU][MC] Allow nodone etc. in exp instructions (#172749)Jun Wang7-28/+450
12 hoursAdd SDNodeFlag::NoConvergent (#179323)Stanislav Mekhanoshin3-1/+12
12 hours[RegAlloc] Change the computation of CSRCost (#177226)weiguozhi7-35/+212
12 hours[Evaluator] require invariant size to fully span the global (#179518)Jameson Nash1-3/+2
12 hours[RISCV] Add tied destination constraint to CustomSiFiveVMACC. (#179567)Craig Topper1-1/+2
12 hours[RISCV] Remove deprecated RISCVSubtarget::hasStdExtCOrZca(). NFC (#179616)Craig Topper1-2/+0
13 hours[AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (#179603)vangthao953-222/+108
13 hours[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)Jay Foad154-944/+840
13 hours[RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (#179615)Craig Topper5-8/+80
13 hours[llvm-readelf] --unwind: Support DW_EH_PE_sdata8 encoding (#179152)Fangrui Song3-7/+165
13 hours[AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (#179566)vangthao959-24/+31
13 hoursUpdate my email across the project (#179361)Reid Kleckner1-2/+2
13 hoursAMDGPU: Implement computeKnownFPClass for llvm.amdgcn.fract (#179134)Matt Arsenault2-0/+83
13 hoursAMDGPU: Implement computeKnownFPClass for llvm.amdgcn.trig.preop (#179026)Matt Arsenault2-0/+16
13 hoursAMDGPU: Fix incorrect fold of undef for llvm.amdgcn.trig.preop (#179025)Matt Arsenault2-43/+44
13 hours[NVPTX][NFC] Update fence.py and cmpxchg.py to generate ptxas-sm_XY and ptxas...Akshay Deodhar7-12/+21
13 hours[SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (#...sujianIBM2-32/+37
14 hours[X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (#179682)Jay Foad1-2/+2
14 hours[SLP][NFC]Add another shl-to-add transformation test, NFCAlexey Bataev1-0/+56
14 hours[X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (#174761)Islam Imad3-80/+529
14 hours[SystemZ][z/OS] Set R5 as not restored. (#179666)sujianIBM2-5/+28
14 hours[TableGen] Remove warning IntrinsicsToAttributesMap needs > 16 bits (#179533)Rahul Joshi1-4/+0
14 hours[AMDGPU][True16] t16 pseudo for mubuffer d16 load/store (#178822)Brox Chen33-718/+1222
15 hours[gn build] Port 5cc22a9772c6LLVM GN Syncbot1-0/+1
15 hours[SystemZ][GOFF] Implement lowerConstant (#179394)Tony Tao3-0/+71
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