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2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"WIP/20May2024-nextTom Rini7-2/+13
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini7-13/+2
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06global: Make <asm/global_data.h> include <asm/u-boot.h>Tom Rini3-1/+7
This follows the example of RISC-V where <asm/global_data.h> includes <asm/u-boot.h> directly as "gd" includes a reference to bd_info already and so the first must include the second anyhow. We then remove <asm/u-boot.h> from all of the places which include references to "gd" an so have <asm/global_data.h> already. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06powerpc: Remove <common.h> and add needed includesTom Rini4-1/+6
Remove <common.h> from all powerpc architecture files and when needed add missing include files directly. This typically involves using <asm/u-boot.h> instead due to the difficult nested structure of the PowerPC includes themselves. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-21global: Rework architecture global_data.h to include <linux/types.h>Tom Rini1-1/+0
In most cases, the architecture global data currently makes use of assorted linux types, but does not include <linux/types.h> to provide them. Add <linux/types.h> instead of relying on indirect inclusion. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-28Merge patch series "Import "string" I/O functions from Linux"Tom Rini1-0/+11
To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
2023-11-28powerpc: io.h: Add defines for __raw_{read, write} functionsIgor Prusov1-0/+11
Add defines for __raw_{read,write}{b,w,l}() functions to make make asm-generic/io.h aware of them. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-07powerpc: Rework <asm/fsl_lbc.h> includesTom Rini1-3/+0
This file should not include <config.h> nor should it include <common.h> so remove both. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07powerpc: Switch <asm/global_data.h> to <linux/types.h>Tom Rini1-1/+1
In matching other architectures that have their global_data.h need to bring in a types.h header, switch to <linux/types.h> on PowerPC. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-31powerpc: use asm-generic/unaligned.hJens Wiklander1-16/+2
Powerpc configurations are apparently able to do unaligned accesses. But in an attempt to clean up and handle unaligned accesses in the same way we ignore that and use the common asm-generic/unaligned.h directly instead. Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-31include: Remove unused header filesTom Rini2-70/+0
As part of various code clean-ups we have on occasion missed removing unused header files. None of these files are referenced anywhere else at this point. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-05powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATAChristophe Leroy1-0/+7
MPC885 CPU has the following ERRATA: When the USB controller is configured in Host mode, and the SOF generation (SFTE=1 in USMOD register) is being used, there may be false CRC error indication in other SCCs. Although the data is received correctly, the CRC result will be corrupted. Add capability to load the related microcode to fix it. The microcode binary data is copied from Linux kernel. Other microcode will be added in following patch so make it a Kconfig choice. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-05-05powerpc: Force cast on memcpy_toio()Christophe Leroy1-3/+3
sparse reports the following warning: CHECK arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c:29:9: warning: cast removes address space '<asn:2>' of expression arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c:30:9: warning: cast removes address space '<asn:2>' of expression This is because of (void *) casts for using memcpy() as a substitute. Do like other architectures, __force the cast to silence the warning Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-05-04powerpc: mpc8xx: Reorganise init RAMChristophe Leroy1-8/+8
Using SMC relocation microcode patch or USB-SOF microcode patch will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00 to 0x3000. At the time being, init RAM is setup to use 0x2800-0x2e00, but the stack pointer goes beyond 0x2800 and even beyond 0x2400. For the time being we are not going to use any microcode patch that uses memory about 0x3000, so reorganise setup to use: - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers - 0x3000 - 0x3c00 for init stack For more details about CPM dual port ram, see commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-05-04powerpc: mpc8xx: CPM parameter RAM can be anywhereChristophe Leroy2-16/+10
With relocation, CPM parameter RAM can be anywhere in the dual port RAM, so don't split dual port RAM. Remove dparam and dparam16 members of struct comm_proc PROFF_XXX become offsets from the start of dual port RAM, then they are now consistant with the offsets in RPBASE registers. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-04-06spi: mpc8xxx: Add support for SPI on mpc832xChristophe Leroy1-0/+1
On mpc832x, SPI can be either handled by CPU or QE. In order to work in CPU mode, bit 17 of SPMODE has to be set to 1, that bit is called OP. Also, data is located at a different place than the one expected by the driver today. In 8 bits mode with REV set, data to be transmitted is located in the most significant byte while received data is located in second byte. So perform the necessary shifts. In order to differentiate with other CPUs, a new compatible is added for mpc832x: fsl,mpc832x-spi Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-04-06gpio: Add QUICC Engine GPIOs driverChristophe Leroy1-0/+5
The mpc832x has GPIOs handled by the QUICC Engine. The registers are different from the one for the non QE mpc83xx GPIOs. Implement a GPIO driver for those. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-04-06powerpc: mpc83xx: Fix soc.hChristophe Leroy1-8/+8
There are helpers included in soc.h Declare them static inline so that soc.h can be included in several places. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-02-11driver, gpio: Add support for MPC 8xx CPU portsChristophe Leroy1-0/+12
Ports A, C and D are 16 bits ports. Ports B and E are 32 bits ports. The "compatible" is used to determine each port type. This patch was originally written by Charles Frey who's email address is not valid anymore as he left the company. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
2023-01-20global: Finish CONFIG -> CFG migrationTom Rini2-5/+5
At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20nxp: Finish migration of SYS_FSL_SRDS_[12] to KconfigTom Rini1-8/+0
As this is used on both ARM and PowerPC platforms, this needs to be listed in arch/Kconfig.nxp and match how they're currently used by select'ing them under the required PowerPC ARCH_xxx options. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to KconfigTom Rini1-14/+0
As this is used on both ARM and PowerPC platforms, this needs to be asked in arch/Kconfig.nxp. Set the PowerPC defaults based on arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in drivers/mtd/nand/raw/fsl_ifc_nand.c Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20global: Remove unused CONFIG definesTom Rini1-31/+0
Remove some CONFIG symbols and related comments, etc, that are unused within the code itself at this point. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_QBMAN_CLK_DIV to CFGTom Rini1-1/+1
Perform a simple rename of CONFIG_QBMAN_CLK_DIV to CFG_QBMAN_CLK_DIV Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_PME_PLAT_CLK_DIV to CFGTom Rini1-4/+4
Perform a simple rename of CONFIG_PME_PLAT_CLK_DIV to CFG_PME_PLAT_CLK_DIV Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MAX_MEM_MAPPED to CFGTom Rini1-3/+3
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_FM_PLAT_CLK_DIV to CFGTom Rini1-2/+2
Perform a simple rename of CONFIG_FM_PLAT_CLK_DIV to CFG_FM_PLAT_CLK_DIV Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22T104xRDB: Remove non-TARGET_T1042D4RDB variantsTom Rini1-2/+0
At this point only the TARGET_T1042D4RDB variant of this is supported in tree, so remove the remaining parts of the other platforms. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22powerpc: Migrate CONFIG_PPC_SPINTABLE_COMPATIBLE to KconfigTom Rini1-6/+0
Move this symbol to Kconfig, and preserve the current behavior. The help text here comes from where the relevant code is implemented and it is quite likely at this point in time we could either disable this option or at least make it configurable. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22ddr: fsl: Remove CONFIG_MEM_INIT_VALUETom Rini1-1/+1
The way all of the memory init code here works is that we pass 0xDEADBEEF around for the initial value (as it's a well known 'poison' value and so easily recognized in debuggers, etc). The only point of this CONFIG symbol was to pass in a different value for that purpose. Drop this symbol and cleanup the code slightly. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22global: Remove unused CONFIG symbolsTom Rini1-1/+0
This removes the following unreferenced CONFIG symbols: CONFIG_FDTADDR CONFIG_FDTFILE CONFIG_FLASH_SECTOR_SIZE CONFIG_FSL_CPLD CONFIG_HDMI_ENCODER_I2C_ADDR CONFIG_I2C_MVTWSI CONFIG_I2C_RTC_ADDR CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE CONFIG_L1_INIT_RAM CONFIG_MACB_SEARCH_PHY CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MTD_NAND_VERIFY_WRITE CONFIG_MVGBE_PORTS CONFIG_NETDEV CONFIG_NUM_DSP_CPUS CONFIG_PHY_BASE_ADR CONFIG_PHY_INTERFACE_MODE CONFIG_PSRAM_SCFG CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE CONFIG_RD_LVL CONFIG_ROCKCHIP_SDHCI_MAX_FREQ CONFIG_SETUP_INITRD_TAG CONFIG_SH_QSPI_BASE CONFIG_SMDK5420 CONFIG_SOCRATES CONFIG_SPI_ADDR CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET CONFIG_TEGRA_SLINK_CTRLS CONFIG_TPM_TIS_BASE_ADDRESS CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM And also: BL1_SIZE PHY_NO RESERVE_BLOCK_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22Convert CONFIG_FLASH_SPANSION_S29WS_N et al to KconfigTom Rini2-25/+0
This converts the following to Kconfig: CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FSL_FM_10GEC_REGULAR_NOTATION CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_TRUST_ARCH_v1 CONFIG_FSL_SDHC_V2_3 CONFIG_MAX_DSP_CPUS CONFIG_MIU_2BIT_INTERLEAVED CONFIG_SERIAL_BOOT CONFIG_SPI_BOOTING CONFIG_X86EMU_RAW_IO Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-07net: tsec: Remove non-DM_ETH support codeTom Rini3-30/+0
As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Doing this removes some board support code which was also unused. Finally, this removes some CONFIG symbols that otherwise needed to be migrated to Kconfig, but were unused in code now. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05Convert CONFIG_FSL_LBC to KconfigTom Rini1-8/+0
This converts the following to Kconfig: CONFIG_FSL_LBC Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05global: Move remaining CONFIG_SYS_* to CFG_SYS_*Tom Rini6-68/+68
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*Tom Rini2-18/+18
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05Remove unused symbolsTom Rini1-8/+0
This commit removes the following unused symbols: CONFIG_SYS_NVRAM_BASE_ADDR CONFIG_SYS_NVRAM_SIZE CONFIG_SYS_PAXE_BASE CONFIG_SYS_PCCNT CONFIG_SYS_PCDAT CONFIG_SYS_PCDDR CONFIG_SYS_PCI1_ADDR CONFIG_SYS_PCI2_ADDR CONFIG_SYS_PCI1_IO_BUS CONFIG_SYS_PCI1_IO_SIZE CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_SIZE CONFIG_SYS_PCIE3_ADDR CONFIG_SYS_PCIE4_ADDR CONFIG_SYS_PCIE3_IO_PHYS CONFIG_SYS_PCIE3_IO_VIRT CONFIG_SYS_PCIE4_IO_PHYS CONFIG_SYS_PCIE4_IO_VIRT CONFIG_SYS_PLL_SETTLING_TIME CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_SP_CENA_SIZE CONFIG_SYS_RCAR_I2C0_BASE CONFIG_SYS_RCAR_I2C1_BASE CONFIG_SYS_RCAR_I2C2_BASE CONFIG_SYS_RCAR_I2C3_BASE CONFIG_SYS_SATA CONFIG_SYS_SDRAM_BASE2 CONFIG_SYS_SGMII_REFCLK_MHZ CONFIG_SYS_SGMII_LINERATE_MHZ CONFIG_SYS_SGMII_RATESCALE CONFIG_SYS_SH_SDHI0_BASE CONFIG_SYS_SH_SDHI0_BASE CONFIG_SYS_SH_SDHI1_BASE CONFIG_SYS_SH_SDHI2_BASE CONFIG_SYS_SH_SDHI3_BASE CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT CONFIG_SYS_VCXK_BASE CONFIG_SYS_VCXK_DEFAULT_LINEALIGN CONFIG_SYS_VCXK_DOUBLEBUFFERED CONFIG_SYS_VCXK_ENABLE_DDR CONFIG_SYS_VCXK_ENABLE_PIN CONFIG_SYS_VCXK_ENABLE_PORT CONFIG_SYS_VCXK_INVERT_DDR CONFIG_SYS_VCXK_INVERT_PIN CONFIG_SYS_VCXK_INVERT_PORT CONFIG_SYS_VCXK_REQUEST_DDR CONFIG_SYS_VCXK_REQUEST_PIN CONFIG_SYS_VCXK_REQUEST_PORT CONFIG_SYS_VSC7385_BR_PRELIM CONFIG_SYS_VSC7385_OR_PRELIM Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05global: Move remaining CONFIG_SYS_NUM_* to CFG_SYS_NUM_*Tom Rini2-41/+41
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NUM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*Tom Rini1-1/+1
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550 namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini4-176/+175
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespaceTom Rini4-129/+129
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-10Convert CONFIG_SYS_INIT_RAM_LOCK to KconfigTom Rini1-2/+0
This converts the following to Kconfig: CONFIG_SYS_INIT_RAM_LOCK Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-06common/board_f: remove XTRN_DECLARE_GLOBAL_DATA_PTR dead codeOvidiu Panait1-6/+0
The XTRN_DECLARE_GLOBAL_DATA_PTR declarations in ppc code are permanently commented out, so there are no users for this macro: #if 1 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") #else /* We could use plain global data, but the resulting code is bigger */ #define XTRN_DECLARE_GLOBAL_DATA_PTR extern #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ gd_t *gd #endif Remove all references to this macro, but add a documentation note regarding the possibility of using plain global data for the GD pointer. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-20powerpc: remove support for kmtergr1 and MPC8309Holger Brunck4-65/+1
The kmtegr1 board is out of maintenance and can be removed. As it is the only board in the tree using MPC8309 the support for this CPU is dropped completely. Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-08-12Convert CONFIG_SYS_FSL_QMAN_V3 et al to KconfigTom Rini1-42/+0
This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_PCIE_COMPAT to KconfigTom Rini1-12/+0
This converts the following to Kconfig: CONFIG_SYS_FSL_PCIE_COMPAT To do this, introduce a choice and option for each of the strings used and set CONFIG_SYS_FSL_PCIE_COMPAT based on that. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_NUM_CC_PLLS to KconfigTom Rini1-8/+0
This converts the following to Kconfig: CONFIG_SYS_FSL_NUM_CC_PLLS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to KconfigTom Rini1-5/+0
This converts the following to Kconfig: CONFIG_SYS_FSL_MAX_NUM_OF_SEC Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et alTom Rini2-23/+0
This removes the following symbols: CONFIG_SYS_FSL_DSPI_BE CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET CONFIG_SYS_FSL_DSP_DDR_ADDR CONFIG_SYS_FSL_DSP_M2_RAM_ADDR CONFIG_SYS_FSL_DSP_M3_RAM_ADDR CONFIG_SYS_FSL_ERRATUM_A008751 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT CONFIG_SYS_FSL_ESDHC_NUM CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_QSPI_LE CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR CONFIG_SYS_FSL_SRDS_NUM_PLLS CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR CONFIG_SYS_GP2DIR CONFIG_SYS_GP2ODR CONFIG_SYS_HALT_BEFOR_RAM_JUMP CONFIG_SYS_HMI_BASE FSL_QSPI_FLASH_NUM FSL_QSPI_FLASH_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_FSL_CORES_PER_CLUSTER to KconfigTom Rini1-6/+0
This converts the following to Kconfig: CONFIG_SYS_FSL_CORES_PER_CLUSTER As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE. Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-07-06 12:19:33 +0000