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| author | Tom Rini <trini@konsulko.com> | 2022-11-27 10:25:04 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-07 16:04:16 -0500 |
| commit | 2f420f135ffdc7d30834d640efb504261426afa3 (patch) | |
| tree | 78c099315bc1a71e69ad34f24f4b8045ffabd18b /arch/powerpc/include | |
| parent | 8457d023b8907fea75c47887c0cfb144c4bc3472 (diff) | |
| download | u-boot-2f420f135ffdc7d30834d640efb504261426afa3.zip u-boot-2f420f135ffdc7d30834d640efb504261426afa3.tar.gz u-boot-2f420f135ffdc7d30834d640efb504261426afa3.tar.bz2 | |
net: tsec: Remove non-DM_ETH support code
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code. Doing this removes some board support code
which was also unused. Finally, this removes some CONFIG symbols that
otherwise needed to be migrated to Kconfig, but were unused in code now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 17 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/immap_83xx.h | 5 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 8 |
3 files changed, 0 insertions, 30 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d9e5a7d..1b5b494 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -24,18 +24,9 @@ #elif defined(CONFIG_ARCH_P1010) #define CONFIG_FSL_SDHC_V2_3 -#define CONFIG_TSECV2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 -/* P1011 is single core version of P1020 */ -#elif defined(CONFIG_ARCH_P1011) -#define CONFIG_TSECV2 - -#elif defined(CONFIG_ARCH_P1020) -#define CONFIG_TSECV2 - #elif defined(CONFIG_ARCH_P1021) -#define CONFIG_TSECV2 #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 @@ -47,13 +38,8 @@ #define CFG_SYS_BMAN_NUM_PORTALS 3 #define CFG_SYS_FM_MURAM_SIZE 0x10000 -/* P1024 is lower end variant of P1020 */ -#elif defined(CONFIG_ARCH_P1024) -#define CONFIG_TSECV2 - /* P1025 is lower end variant of P1021 */ #elif defined(CONFIG_ARCH_P1025) -#define CONFIG_TSECV2 #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 @@ -108,12 +94,10 @@ #elif defined(CONFIG_ARCH_BSC9131) #define CONFIG_FSL_SDHC_V2_3 -#define CONFIG_TSECV2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #elif defined(CONFIG_ARCH_BSC9132) #define CONFIG_FSL_SDHC_V2_3 -#define CONFIG_TSECV2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #elif defined(CONFIG_ARCH_T4240) @@ -221,7 +205,6 @@ #elif defined(CONFIG_ARCH_C29X) #define CONFIG_FSL_SDHC_V2_3 -#define CONFIG_TSECV2_1 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FSL_SEC_IDX_OFFSET 0x20000 diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h index 19774f3..24bd438 100644 --- a/arch/powerpc/include/asm/immap_83xx.h +++ b/arch/powerpc/include/asm/immap_83xx.h @@ -873,9 +873,4 @@ struct ccsr_gpio { #define CFG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc) -#define CFG_SYS_TSEC1_OFFSET 0x24000 -#define CFG_SYS_MDIO1_OFFSET 0x24000 - -#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CFG_SYS_TSEC1_OFFSET) -#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CFG_SYS_MDIO1_OFFSET) #endif /* __IMMAP_83xx__ */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 283fdf3..7293720 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2541,13 +2541,6 @@ struct ccsr_pman { #define CFG_SYS_MPC85xx_USB2_OFFSET 0x23000 #define CFG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000 #define CFG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100 -#ifdef CONFIG_TSECV2 -#define CFG_SYS_TSEC1_OFFSET 0xB0000 -#elif defined(CONFIG_TSECV2_1) -#define CFG_SYS_TSEC1_OFFSET 0x10000 -#else -#define CFG_SYS_TSEC1_OFFSET 0x24000 -#endif #define CFG_SYS_MDIO1_OFFSET 0x24000 #define CFG_SYS_MPC85xx_ESDHC_OFFSET 0x2e000 #if defined(CONFIG_ARCH_C29X) @@ -2673,7 +2666,6 @@ struct ccsr_pman { #define CFG_SYS_SEC_MON_ADDR \ (CONFIG_SYS_IMMR + CFG_SYS_SEC_MON_OFFSET) -#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CFG_SYS_TSEC1_OFFSET) #define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CFG_SYS_MDIO1_OFFSET) #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 |