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authorTom Rini <trini@konsulko.com>2023-11-28 16:19:19 -0500
committerTom Rini <trini@konsulko.com>2023-11-28 16:19:19 -0500
commit38cc6cdeb104d4835a73b8946b31e30ce762ddeb (patch)
tree78b962005441f24b3042b2c9f8b21d7cfcf98922 /arch/powerpc/include
parent66c21738fd5ac3f23929911dd7aa38e1a3671eb9 (diff)
parent89994d64acbaf2e864d2050730abab5fb3b6f956 (diff)
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Merge patch series "Import "string" I/O functions from Linux"
To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/io.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index f63cae0..2412bb9 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -138,26 +138,37 @@ static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
}
+#define __raw_readb __raw_readb
+
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
}
+#define __raw_readw __raw_readw
+
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
}
+#define __raw_readl __raw_readl
+
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writeb __raw_writeb
+
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writew __raw_writew
+
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writel __raw_writel
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.