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| author | Tom Rini <trini@konsulko.com> | 2022-12-02 16:42:31 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-22 10:31:48 -0500 |
| commit | 308520b8f2b11b3427fe8a02171839992bc85da6 (patch) | |
| tree | 9c01ea4c3087e510f0aecce23f83b9e2f9f44dca /arch/powerpc/include | |
| parent | 1353b25ec58eba4cd26f4101ebb1b6047838a105 (diff) | |
| download | u-boot-308520b8f2b11b3427fe8a02171839992bc85da6.zip u-boot-308520b8f2b11b3427fe8a02171839992bc85da6.tar.gz u-boot-308520b8f2b11b3427fe8a02171839992bc85da6.tar.bz2 | |
global: Remove unused CONFIG symbols
This removes the following unreferenced CONFIG symbols:
CONFIG_FDTADDR
CONFIG_FDTFILE
CONFIG_FLASH_SECTOR_SIZE
CONFIG_FSL_CPLD
CONFIG_HDMI_ENCODER_I2C_ADDR
CONFIG_I2C_MVTWSI
CONFIG_I2C_RTC_ADDR
CONFIG_IRAM_END
CONFIG_IRAM_SIZE
CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
CONFIG_L1_INIT_RAM
CONFIG_MACB_SEARCH_PHY
CONFIG_MIU_2BIT_21_7_INTERLEAVED
CONFIG_MTD_NAND_VERIFY_WRITE
CONFIG_MVGBE_PORTS
CONFIG_NETDEV
CONFIG_NUM_DSP_CPUS
CONFIG_PHY_BASE_ADR
CONFIG_PHY_INTERFACE_MODE
CONFIG_PSRAM_SCFG
CONFIG_RAMBOOT_SPIFLASH
CONFIG_RAMBOOT_TEXT_BASE
CONFIG_RD_LVL
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
CONFIG_SETUP_INITRD_TAG
CONFIG_SH_QSPI_BASE
CONFIG_SMDK5420
CONFIG_SOCRATES
CONFIG_SPI_ADDR
CONFIG_SPI_FLASH_QUAD
CONFIG_SPI_FLASH_SIZE
CONFIG_SPI_HALF_DUPLEX
CONFIG_SPI_N25Q256A_RESET
CONFIG_TEGRA_SLINK_CTRLS
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_UBOOT_SECTOR_COUNT
CONFIG_UBOOT_SECTOR_START
CONFIG_VAR_SIZE_SPL
CONFIG_VERY_BIG_RAM
And also:
BL1_SIZE
PHY_NO
RESERVE_BLOCK_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index edaf8ba..e805991 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -133,7 +133,6 @@ #define CFG_SYS_FM_MURAM_SIZE 0x60000 #ifdef CONFIG_ARCH_B4860 -#define CONFIG_NUM_DSP_CPUS 6 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CFG_SYS_NUM_FM1_DTSEC 6 #define CFG_SYS_NUM_FM1_10GEC 2 |