aboutsummaryrefslogtreecommitdiff
path: root/tcl
AgeCommit message (Collapse)AuthorFilesLines
2024-08-20Merge up to ac63cd00d792331914db0b6edd3f427c30eec3fa from upstreamParshintsev Anatoly28-34/+170
- src/jtag/drivers/ftdi.c: ``` ++<<<<<<< HEAD + int i; + static const uint8_t zero; ++======= + uint8_t zero = 0; ++>>>>>>> ocd_upstream ``` Decided to choose the latter. - src/target/riscv/riscv-013.c: ``` ++<<<<<<< HEAD + int abs_chain_position; + /* The base address to access this DM on DMI */ + uint32_t base; ++======= + unsigned int abs_chain_position; + ++>>>>>>> ocd_upstream ``` Decided to choose the latter (abs_chain_position is unsigned now) - src/target/riscv/batch.c: ``` ++<<<<<<< HEAD ++======= + void dump_field(int idle, const struct scan_field *field) + { ... + } ++>>>>>>> ocd_upstream ``` dump_field function is not needed anymore Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
2024-08-16tcl/interface/raspberrypi5-gpiod: fix string match pattern escapingTomas Vanek1-2/+1
Use correct TCL syntax and save string map operation. Change-Id: Ic2a522bd57cf6610b7df1d9cddd0fbdc2076ed62 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8426 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-08-02tcl: fix minor typos and repeated wordsAntonio Borneo5-6/+6
Detected with checkpatch. Change-Id: Id306928496cf70bbe7ff065bf726bc7dceadce26 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8409 Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2024-08-02tcl/target: add initial Bouffalo Lab BL702 chip series supportMarek Kraus1-0/+60
Adds initial support for the BL702 series of chips, BL702, BL704 and BL706. No flash bank support yet. File name bl702.tcl was chosen over bl70x.tcl, because Bouffalo Lab uses bl702 to mark the whole series in many of their tools. The ndmreset bit in the RISC-V Debug Module isn't implemented correctly, so it doesn't trigger a system reset as it should. To solve this problem, the software reset is implemented in the reset-assert-pre hook, which uses best reset method I could find. What is not reset is the GLB core, which handles GPIOs, pinmux, etc. The reset mechanism has been extensively tested, and works correctly for both "reset run" and "reset halt", which the latter halts very early in the BootROM. Change-Id: I5ced6eb3902d1b9d9c1bba56f817ec5dc3493cb0 Signed-off-by: Marek Kraus <gamelaster@outlook.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8407 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-07-13tcl/board: Add am62p/am62a7/j722s native swd configurationNishanth Menon4-0/+77
Direct memory driver swd native configuration for am62a7, am62p and J722S SoCs. All three share common memory map for the debug address map, so there is a strong reuse. However, introduce board file specific to the board to allow users to directly get started. Change-Id: I5609925a2e9918fd4c91d9fd40fbee98de27fdbc Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8283 Tested-by: jenkins Reviewed-by: Vaishnav M A <vaishnav@beagleboard.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2024-07-13tcl: Replace 'tcl_' prefix with 'tcl' command groupMarc Schink2-2/+2
Change-Id: Iee1e84a87d07172aa6b0adfb7b85fb465cefb979 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8345 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-07-13tcl: Replace 'gdb_' prefix with 'gdb' command groupMarc Schink13-14/+14
Change-Id: I0490b4c112c1a922bf77a4b37df2a630a8f6cea1 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8337 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-07-13tcl: Replace 'hla_' prefix with 'hla' command groupMarc Schink3-8/+8
Change-Id: I99ec2dc7f300352d091cf9eb807a690901c33307 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8338 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-07-13flash: psoc6: drop use of 'coreid' to identify the CPUAntonio Borneo1-2/+2
The flag '-coreid' is used by the command 'target create' to specify the debug controller of the target, either in case of a single debug controller for multiple CPU (e.g. RISC-V harts) or in case of multiple CPU on a DAP access port (e.g. Cortex-A SMP cluster). It is also currently used to specify the CPU ID in a SMP cluster, but this is going to be reworked. This flag has no effects on Cortex-M; ARM specifies that only one CPU Cortex-M can occupy the DAP access port by using hardcoded addresses. The flash driver 'psoc6' uses the flag '-coreid' to detect if the current target is the Cortex-M0 on AP#1 or the Cortex-M4 on AP#2 in the SoC. There are other ways to run such detection, without using such unrelated '-coreid' flag, e.g. using the AP number or the arch type of the target. Use the arch type to detect Cortex-M0 (ARM_ARCH_V6M) vs Cortex-M4 (ARM_ARCH_V7M). Drop the flags '-coreid' from the psoc6 configuration file. Change-Id: I0b9601c160dd4f2421a03ce6e3e7c55c6212f714 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8128 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-25Merge up to ad87fbd1cf28760795c4e18f3318a2d720e5a8a6 from upstreamEvgeniy Naydanov20-126/+599
Conflicts: * `doc/openocd.texi`: due to d382c95d57c0ad9ed2dcc83c95404babb7647708, resolved by selecting the upstream version. * `src/server/gdb_server.c`: between 944fe66f104e356c5fcd2b5c25200cebef9b389c and 92e8823ebdb6d01b41bb5d79af49501d525acd1d. Resolved by adopting the use of `LOG_TARGET_*`. * `src/target/target.c`: between 639e68a621b7ae8c4a296ca7e45b47075268fded and c5358c84ad0d3e7497498e0457cec7785f72910a, selected the version from `riscv-openocd`. Change-Id: Ic1327f25e147945e0ec82947a82452501e8ee5de
2024-06-25tcl/interface: support for Raspberry Pi 5Tomas Vanek3-12/+51
Make sure raspberrypi-native.cfg cannot be used on RPi5. Add raspberrypi5-gpiod.cfg which uses linuxgpiod adapter driver. Issue a warning if PCIe is in power save mode. While on it, re-format warnings issued from Tcl to look similar to LOG_WARNING() output. Change-Id: If19b0350bd5fff83d9a0c65999e33b161fb6957a Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8333 Tested-by: jenkins Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2024-06-15pld/intel: remove idcodes from intel.cDaniel Anselmi6-108/+126
Remove list of id codes for all families. Maintain a list with id, bscan-length and check position in the tcl config files for each family. The Intel FPGA Driver option 'family' is not otional anymore. Change-Id: I9a40a041069e84f6b4728f2cd715756a36759c89 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/8083 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-15tcl/board: Support for Digilent Nexys 2 boardGeorge Voicu1-0/+30
Support Digilent Nexys 2 board JTAG chain Signed-off-by: George Voicu <razvanvg@hotmail.com> Change-Id: I350f80b49303c4b0402d93ebc120a591ef727551 Reviewed-on: https://review.openocd.org/c/openocd/+/7336 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15tcl/fpga: Support for Xilinx Spartan3 series devicesGeorge Voicu1-0/+43
Tap definition for Xilinx Spartan 3/3E/3A/3AN/3A-DSP devices. Signed-off-by: George Voicu <razvanvg@hotmail.com> Change-Id: Ieda2b61fc270840f9192976697fcac259c45e3b8 Reviewed-on: https://review.openocd.org/c/openocd/+/7335 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-15tcl/fpga/xilinx-dna: Support for reading Spartan3 DNA codeGeorge Voicu1-0/+6
Add Xilinx Spartan3 ISC_DNA instruction Signed-off-by: George Voicu <razvanvg@hotmail.com> Change-Id: Iaddb079c9fdd1b91c65def36878fe81783098696 Reviewed-on: https://review.openocd.org/c/openocd/+/7331 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/target: add nRF53 and nRF91 config filesTomas Vanek3-0/+295
Both devices can be configured with or without SWD multidrop. nRF53 network core is examined on demand to avoid problems when the core is forced off. Change-Id: I08f88ff48ff7ac592e9214b89ca8e5e9428573a5 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8113 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08tcl/board: Add config for NXP FRDM-KV31FMarc Schink1-0/+21
Change-Id: I4d7cd1bcadd8159e4830107c2788708aef02add0 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8299 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/board: Add config for NXP FRDM-KV11ZMarc Schink1-0/+21
Change-Id: I9cd497a085f8f9c7854ae3b96e60a73b3b050d0e Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8298 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08tcl/chip/st/spear: fix syntax errorsNoah Moroze1-2/+2
While the current jimtcl does not consider this an error, the Tcl dodekalogue states that strings terminate at the second double quote character (see https://www.tcl.tk/man/tcl/TclCmd/Tcl.htm#M8). These syntax errors were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint tcl/chip/st/spear/spear3xx_ddr.tcl | grep "syntax error" ``` Change-Id: I2763d93095e3db7590644652f16b7b24939d6cae Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8281 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-08tcl/target/c100helper: fix syntax errorsNoah Moroze1-2/+2
Fixes: 64d89d5ee1a5 ("tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change") These syntax errors were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint tcl/target/c100helper.tcl | grep "syntax error" ``` Change-Id: I511c54353c4853560adca6b4852d48df2aade283 Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8280 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-06-08tcl/memory: fix syntax errorsNoah Moroze1-2/+2
Using a command in an expression requires a bracketed command substitution. These syntax errors were caught by tclint v0.2.5 (https://github.com/nmoroze/tclint): ``` tclint tcl/memory.tcl | grep "syntax error" ``` Change-Id: I510d46222f4fb02d6ef73121b231d5b2df77e5c0 Signed-off-by: Noah Moroze <noahmoroze@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8279 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-05-30Merge up to 437dde701c13e707e5fd912ef6403e09052e4d9b from upstreamEvgeniy Naydanov2-6/+157
Conflict in src/rtos/FreeRTOS.c due to fbea7d5d38d0dcbdd71cb574da9bd12c78b568cf -- resolved by replacing `target->type->name` with a call to `target_type_name()`. Change-Id: I56702c6133894458903de7a4d764903004aa8b86
2024-05-26tcl/target/nrf52: Configure trace port speedMarc Schink1-0/+20
Configure the TRACECONFIG.TRACEPORTSPEED register depending on the trace clock speed. Also catch invalid trace clock speeds. Change-Id: I1ece1cc59da539732d2d71f296fd55799c195387 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8256 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-05-26tcl/target/nrf52: Use 'error' instead of 'echo'Marc Schink1-6/+3
Use 'error' instead of 'echo' for error messages. Otherwise, capturing is always started, for example with an unsupported device. While at it, make the error messages more consistent and clear. Change-Id: I83c9abfb4514e6b638c4be14651e67f768af8bad Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8255 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: <post@frankplowman.com>
2024-05-04tcl/target: Add helpers for booting Xilinx ZynqMP from JTAGSean Anderson1-0/+134
Add some helpers for booting ZynqMPs over JTAG. Normally, the CSU ROM will load boot.bin from the boot medium. However, when booting from JTAG we have to do this ourselves. There are generally two parts to this. First, we need to load the PMU firmware. Xilinx's tools do this by attaching to the PMU (a Microblaze CPU) over JTAG. However, the TAP is undocumented and we don't have any microblaze support in-tree. So instead we do it the same way FSBL does it: - We ask the PMU to halt - We load the firmware into the PMU RAM - We ask the PMU to resume The second thing we need to do is start one of the APU cores. When an APU is released from reset, it starts executing at the value of its RVBARADDR. While we could load the APU firmware over the AXI target, it is faster to load it over the APU target. To do this, we put the APU into an infinite loop before halting it. As an aside, I chose to use the "APU" terminology as opposed to "core" to make it clear that these commands operate on the A53 cores and not the R5F cores. Typical usage of these commands could look something like targets uscale.axi boot_pmu /path/to/pmu-firmware.bin boot_apu /path/to/u-boot-spl.bin But of course there is always the option to call lower-level commands individually if your boot process is more unusual. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Change-Id: I816940c2022ccca0fabb489aa75d682edd0f6138 Reviewed-on: https://review.openocd.org/c/openocd/+/8133 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-04-27Merge up to 04154af5d6cd5fe76a2583778379bdacb5aa6fb0 from upstreamEvgeniy Naydanov1-1/+1
Change-Id: I84c1566472e5416bc2a71afa5adaf63c6c7a4a75
2024-04-07zynq_7000.cfg: Fix issue 'Error: can't read "zynq_pl": no such variable'Dominik Wernberger1-1/+1
Change-Id: Ic79ce114b60d0707a6e082a81743b378b164b4e2 Signed-off-by: Dominik Wernberger <dominik.wernberger@gmx.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8190 Reviewed-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2024-03-28Merge up to a35e254c5383008cdacf7838a777f7f17af5eeb1 from upstreamEvgeniy Naydanov6-10/+13
Checkpatch-ignore: MACRO_ARG_REUSE, MACRO_ARG_PRECEDENCE Change-Id: Icd10f44d162054f8f32019a579ccbdda2cee7a91
2024-03-16ipdbg: split ipdbg command into multiple commandsDaniel Anselmi5-5/+10
To simplify the ipdbg start/stop command and be able to add additional commands in the future, we introduce the concept of a hub which has to be created before a ipdbg server can be started. The hub was created on the fly in previous versions. Change-Id: I55f317542d01a7324990b2cacd496a41fa5ff875 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7979 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-03-09target/nrf51: use PAN #16 workaround in reset-init onlyTomas Vanek1-1/+1
After 'reset run' or 'reset halt' the loaded application is expected to manipulate RAMON register to workaround the known silicon errata. Moreover, writing to RAMON register from 'reset-end' event after 'reset run' may collide with application intentions. Use the workaround in 'reset-init' event only to ensure correct function of target algorithms. Change-Id: I7d2d92e6805a05a83676edb46b3163ef39b9a7e4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8104 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-09flash/nor/nrf5, target/nrf51: deprecate nrf51 flash driverTomas Vanek1-4/+2
Use the newer driver name 'nrf5' instead. While on it set the unused parameters of flash bank creation to zero. While on it remove 2 empty comments. Change-Id: I9cf0eadc5b696e6c8b7e6aec0ea3345967523e87 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8103 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-01-29Merge up to 9659a9b5e28dc615dfb508d301fdd8fa426c191b from upstreamEvgeniy Naydanov14-440/+591
Change-Id: I2fda9689d3465b3d8c8f3459b1ed954cb1d70fdc
2024-01-28target/xtensa: add dual-core supportIan Thompson5-372/+455
- Example for configuring multiple non-SMP Xtensa cores e.g. for heterogeneous debug - JTAG only at this time; DAP out of scope - Dual-Xtensa Palladium example via VDebug - Update Xtensa core config examples Signed-off-by: Ian Thompson <ianst@cadence.com> Change-Id: I6d2b3d13fa8075416dcd383cf256a3e8582ee1c1 Reviewed-on: https://review.openocd.org/c/openocd/+/8078 Tested-by: jenkins Reviewed-by: Jacek Wuwer <jacekmw8@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-21jtag/vdebug: add support for DAP6Jacek Wuwer9-68/+136
This change implements the support for the ARM Debug Interface v6. The DAP-level interface properly selects the DP Banks and AP address. Sample ARM configuration DAP and JTAG scripts have been updated. Change-Id: I7df87ef764bca587697c778810443649a7f46c2b Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8067 Tested-by: jenkins Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-10Merge commit 'adcc8ef87bc1ed47c95f1f2d23072b2b916e1555' into en-sc/from_upstreamEvgeniy Naydanov7-0/+455
Change-Id: I6a718561985acf398ee47cec95c6ee6e24b9c9b7
2024-01-06flash/nor/kinetis: add support for NXP S32K seriesDavid Vidrie Leon1-0/+79
S32K General-Purpose Microcontrollers Scalable, low-power Arm® Cortex®-M series-based microcontrollers AEC-Q100 qualified with advanced safety and security and software support for industrial and automotive ASIL B/D applications in body, zone control, and electrification. Change-Id: I4143258535437c18b81802436267bfd561de9d31 Signed-off-by: David Vidrie Leon <davidvidrie@geotab.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8012 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-12-30tcl/target: Add Geehy APM32F1x configMarc Schink1-0/+57
Tested with APM32F103CBT6 using JTAG and SWD transport. All flash operations, including sector and device protection, work as expected. Change-Id: Ibefe1a65d710aea87b86ab7ff8a4153512a0ea4f Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8017 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-12-30tcl/target: Add Geehy APM32F4x configMarc Schink1-0/+57
Tested with APM32407RGT6 using JTAG and SWD transport. All flash operations, including sector and device protection, work as expected. Revision identifier (0x0009) is not updated due to missing documentation. Change-Id: I33f4630fd00096656369ecc923aea2dcad77c7d3 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8016 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-30tcl/target: Add Geehy APM32F0x configMarc Schink1-0/+49
Tested with APM32F030C8T using SWD transport. All flash operations, including sector and device protection, work as expected. Revision identifier (0x0011) is not updated due to missing documentation. Introduce a new directory structure that contains the manufacturer for the sake of clarity. Change-Id: I679387943b09fef640f8f8b6904e542f4e4b29aa Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8015 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-12-30tcl/target: add Marvell Octeon TX2 CN9130 targetHenrik Nordström1-0/+178
This has a quite complex JTAG router chain requiring both a custom BYPASS instruction to access child taps, and JTAG configuration to enable individual DAP nodes. Change-Id: I6f5345764e1566d70c8526a7e8ec5d250185bd2c Signed-off-by: Henrik Nordström <henrik.nordstrom@addiva.se> Reviewed-on: https://review.openocd.org/c/openocd/+/8042 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-24tcl/board: Add TI j722sevm configNishanth Menon1-0/+24
Add basic connection details with j722s EVM For further details, see: https://www.ti.com/lit/zip/sprr495 Change-Id: Ic69d85d69c773c7fad2184561267391fef7a98bc Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8050 Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-12-24tcl/target/ti_k3: Add J722S SoCNishanth Menon1-0/+11
Add support for the TI K3 family J722S SoC. This SoC is a variant of AM62P chassis with a different JTAG ID, additional R5 added in (along with C7x and few other peripheral changes). Reuse existing definition. For further details, see https://www.ti.com/lit/zip/sprujb3 Change-Id: I754e6be8df3a26212437ea955f6a791d7c99b0c8 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8049 Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-12-22Merge commit '16e9b9c44fa62ea6eec99d1fb7bc43a8f1cc2f7e' into from_upstreamTim Newsome2-3/+97
Conflicts: configure.ac tcl/target/gd32vf103.cfg Change-Id: I72bbb973249b7bbfa720696fa2c76a87a41a2e9c
2023-12-10tcl/target/at91sama5d2.cfg: allow choice of SWD instead of JTAGPeter Lawrence1-2/+18
The target supports both SWD and JTAG, but the existing cfg file only supports JTAG. Using the standard [using_jtag] mechanism, the user would now have a choice. Change-Id: Ic6adb68090422812d591f6bf5b945ac10f323c74 Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8020 Reviewed-by: Jörg Wunsch <openocd@uriah.heep.sax.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-05Merge commit 'd4575b647a3603200a9bb4a784d170f792ab88d0' into from_upstreamTim Newsome4-30/+162
Change-Id: Iaa299c50b338089f1b3b7ff7d89fad39ac20a7c1
2023-12-05Merge commit 'a9080087d82688043ca216d50926228d09631297' into from_upstreamTim Newsome1-0/+23
Change-Id: I83a33c1022f8d1a7670ded62f16ec999fc4ef525
2023-12-05Merge commit 'bcaac692d0fce45189279a4c80cbd6852e4bbf4e' into from_upstreamTim Newsome2-6/+71
Conflicts: src/target/breakpoints.c Change-Id: I815ac06fbe74398fad307112e95fde5c49bbc590
2023-11-30tcl/target/gd32vf103: work around broken ndmresetThomas Hebb1-0/+77
On this chip, the ndmreset bit in the RISC-V debug module doesn't trigger a system reset like it should. To work around this, add a custom "reset-assert" handler in its config file that resets the system by writing to memory-mapped registers. I've tested this workaround on a Sipeed Longan Nano dev board with a GD32VF103CBT6 chip. It works correctly for both "reset run" and "reset halt" (halting at pc=0 for the latter). I originally submitted[1] this workaround to the riscv-openocd fork of OpenOCD. That fork's maintainers accepted it, but have not upstreamed it like they have several other of my changes. [1] https://github.com/riscv/riscv-openocd/pull/538 Change-Id: I7482990755b300fcbe4963c9a599d599bc02684d Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6957 Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2023-11-27Merge commit '4b1ea8511a7da9d7201df40302e3341c6e97ffdd' into from_upstreamTim Newsome18-16/+357
Change-Id: I59366e08a4ac7e443e426b5fd6727c649f1ac9d5
2023-11-20Merge commit '18281b0c497694d91c5608be54583172838be75c' into from_upstreamTim Newsome6-2/+169
Change-Id: I05cd5ef9b04fa61a27321ae9b6a4fecabe3dee80
generated by cgit v1.1 at 2025-09-18 19:30:13 +0000