Merge commit '18281b0c497694d91c5608be54583172838be75c' into from_upstream

Change-Id: I05cd5ef9b04fa61a27321ae9b6a4fecabe3dee80

6 files changed, 169 insertions, 2 deletions

diff --git a/tcl/board/ti_am625_swd_native.cfg b/tcl/board/ti_am625_swd_native.cfg
new file mode 100644
index 0000000..dc4b205
--- /dev/null
+++ b/tcl/board/ti_am625_swd_native.cfg
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments am625
+# Link: https://www.ti.com/product/AM625
+#
+# This configuration file is used as a self hosted debug configuration that
+# works on every AM625 platform based on firewall configuration permitted
+# in the system.
+#
+# In this system openOCD runs on one of the CPUs inside AM625 and provides
+# network ports that can then be used to debug the microcontrollers on the
+# SoC - either self hosted IDE OR remotely.
+
+# We are using dmem, which uses dapdirect_swd transport
+adapter driver dmem
+
+if { ![info exists SOC] } {
+	set SOC am625
+}
+
+source [find target/ti_k3.cfg]
diff --git a/tcl/board/ti_am62a7evm.cfg b/tcl/board/ti_am62a7evm.cfg
new file mode 100644
index 0000000..e407909
--- /dev/null
+++ b/tcl/board/ti_am62a7evm.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments am62a7 EVM/SK
+# Link: https://www.ti.com/tool/SK-AM62A-LP
+#
+
+# AM62a7 EVM/SK has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC am62a7
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
diff --git a/tcl/board/ti_j721e_swd_native.cfg b/tcl/board/ti_j721e_swd_native.cfg
new file mode 100644
index 0000000..3041c3c
--- /dev/null
+++ b/tcl/board/ti_j721e_swd_native.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments TDA4VM/J721E
+# Link: https://www.ti.com/product/TDA4VM
+#
+# This configuration file is used as a self hosted debug configuration that
+# works on every TDA4VM platform based on firewall configuration permitted
+# in the system.
+#
+# In this system openOCD runs on one of the CPUs inside TDA4VM and provides
+# network ports that can then be used to debug the microcontrollers on the
+# SoC - either self hosted IDE OR remotely.
+
+# We are using dmem, which uses dapdirect_swd transport
+adapter driver dmem
+
+if { ![info exists SOC] } {
+        set SOC j721e
+}
+source [find target/ti_k3.cfg]
diff --git a/tcl/cpu/arc/v2.tcl b/tcl/cpu/arc/v2.tcl
index d28b9d9..b24a67d 100644
--- a/tcl/cpu/arc/v2.tcl
+++ b/tcl/cpu/arc/v2.tcl
@@ -173,8 +173,8 @@ proc arc_v2_init_regs { } {
 		r19      19 uint32
 		r20      20 uint32
 		r21      21 uint32
-		r22      23 uint32
-		r23      24 uint32
+		r22      22 uint32
+		r23      23 uint32
 		r24      24 uint32
 		r25      25 uint32
 		gp       26 data_ptr
diff --git a/tcl/target/rtl872xd.cfg b/tcl/target/rtl872xd.cfg
new file mode 100644
index 0000000..65730e2
--- /dev/null
+++ b/tcl/target/rtl872xd.cfg
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+# Realtek RTL872xD (ARM Cortex-M33 + M23, wifi+bt dualband soc)
+
+# HLA does not support AP other than 0
+if { [using_hla] } {
+        echo "ERROR: HLA transport cannot work with this target."
+        shutdown
+}
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+        set _CHIPNAME $CHIPNAME
+} else {
+        set _CHIPNAME rtl872xd
+}
+
+if { [info exists CPUTAPID] } {
+        set _CPUTAPID $CPUTAPID
+} else {
+        set _CPUTAPID 0x6ba02477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.km0 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 1
+target create $_TARGETNAME.km4 cortex_m -endian little -dap $_CHIPNAME.dap -ap-num 2
+
+cortex_m reset_config sysresetreq
+
+adapter speed 1000
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 2454357..f0881cd 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -8,8 +8,14 @@
 #  Has 2 ARMV8 Cores and 6 R5 Cores and an M3
 # * J7200: https://www.ti.com/lit/pdf/spruiu1
 #  Has 2 ARMV8 Cores and 4 R5 Cores and an M3
+# * J721S2: https://www.ti.com/lit/pdf/spruj28
+#  Has 2 ARMV8 Cores and 6 R5 Cores and an M4F
 # * AM642: https://www.ti.com/lit/pdf/spruim2
 #  Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
+# * AM625: https://www.ti.com/lit/pdf/spruiv7a
+#  Has 4 ARMV8 Cores and 1 R5 Core and an M4F
+# * AM62a7: https://www.ti.com/lit/pdf/spruj16a
+#  Has 4 ARMV8 Cores and 2 R5 Cores
 #
 
 source [find target/swj-dp.tcl]
@@ -114,6 +120,37 @@ switch $_soc {
 		# M4 processor
 		set _gp_mcu_cores 1
 		set _gp_mcu_ap_unlock_offsets {0xf0 0x7c}
+
+		# Setup DMEM access descriptions
+		# DAPBUS (Debugger) description
+		set _dmem_base_address 0x740002000
+		set _dmem_ap_address_offset 0x100
+		set _dmem_max_aps 10
+		# Emulated AP description
+		set _dmem_emu_base_address 0x760000000
+		set _dmem_emu_base_address_map_to 0x1d500000
+		set _dmem_emu_ap_list 1
+	}
+	am62a7 {
+		set _CHIPNAME am62a7
+		set _K3_DAP_TAPID 0x0bb8d02f
+
+		# AM62a7 has 1 clusters of 4 A53 cores.
+		set _armv8_cpu_name a53
+		set _armv8_cores 4
+		set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000}
+		set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000}
+
+		# AM62a7 has 2 cluster of 1 R5s core.
+		set _r5_cores 2
+		set R5_NAMES {main0_r5.0 mcu0_r5.0}
+		set R5_DBGBASE {0x9d410000 0x9d810000}
+		set R5_CTIBASE {0x9d418000 0x9d818000}
+
+		# sysctrl CTI base
+		set CM3_CTIBASE {0x20001000}
+		# Sysctrl power-ap unlock offsets
+		set _sysctrl_ap_unlock_offsets {0xf0 0x78}
 	}
 	j721e {
 		set _CHIPNAME j721e
@@ -124,6 +161,16 @@ switch $_soc {
 
 		# J721E has 3 clusters of 2 R5 cores each.
 		set _r5_cores 6
+
+		# Setup DMEM access descriptions
+		# DAPBUS (Debugger) description
+		set _dmem_base_address 0x4c40002000
+		set _dmem_ap_address_offset 0x100
+		set _dmem_max_aps 8
+		# Emulated AP description
+		set _dmem_emu_base_address 0x4c60000000
+		set _dmem_emu_base_address_map_to 0x1d600000
+		set _dmem_emu_ap_list 1
 	}
 	j7200 {
 		set _CHIPNAME j7200
@@ -302,3 +349,22 @@ if { $_gp_mcu_cores != 0 } {
 		halt 1000
 	}
 }
+
+# In case of DMEM access, configure the dmem adapter with offsets from above.
+if { 0 == [string compare [adapter name] dmem ] } {
+	if { [info exists _dmem_base_address] } {
+		# DAPBUS (Debugger) description
+		dmem base_address $_dmem_base_address
+		dmem ap_address_offset $_dmem_ap_address_offset
+		dmem max_aps $_dmem_max_aps
+
+		# The following are the details of APs to be emulated for direct address access.
+		# Debug Config (Debugger) description
+		dmem emu_base_address_range $_dmem_emu_base_address $_dmem_emu_base_address_map_to
+		dmem emu_ap_list $_dmem_emu_ap_list
+		# We are going local bus, so speed is really dummy here.
+		adapter speed 2500
+	} else {
+		puts "ERROR: ${SOC} data is missing to support dmem access!"
+	}
+}