| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-01-31 | Pulling in the Zc chapter. | Bill Traynor | 61 | -4/+4791 | |
| Pulling in the Zc chapter. | |||||
| 2024-01-31 | Add zc include to unpriv. | Bill Traynor | 1 | -0/+1 | |
| Add zc include to unpriv. | |||||
| 2024-01-31 | Initial seed of zc.adoc to src tree. | Bill Traynor | 1 | -0/+393 | |
| Added the zc.adoc spec to the src tree. | |||||
| 2024-01-30 | back to draft status | Andrew Waterman | 1 | -2/+2 | |
| 2024-01-30 | priv-1.13 internal review draft | Andrew Waterman | 1 | -2/+2 | |
| 2024-01-30 | Merge pull request #1209 from riscv/svadu | Andrew Waterman | 6 | -13/+75 | |
| Incorporate Svadu and Svade specs | |||||
| 2024-01-30 | Add changelog entry | Andrew Waterman | 1 | -0/+7 | |
| 2024-01-30 | Add Svadu chapter | Andrew Waterman | 3 | -0/+17 | |
| 2024-01-30 | Update translation algorithm to reflect Svade | Andrew Waterman | 1 | -1/+2 | |
| 2024-01-30 | Implicitly define the Svade extension | Andrew Waterman | 1 | -4/+8 | |
| 2024-01-30 | Add henvcfg.ADUE | Andrew Waterman | 2 | -4/+16 | |
| 2024-01-30 | Add menvcfg.ADUE | Andrew Waterman | 2 | -4/+25 | |
| 2024-01-29 | Reorder changelog | Andrew Waterman | 1 | -1/+1 | |
| 2024-01-29 | Add changelog entry for #1206 | Andrew Waterman | 1 | -0/+1 | |
| 2024-01-29 | Add changelog entry for #1116 | Andrew Waterman | 1 | -0/+1 | |
| 2024-01-29 | Add changelog entry for #1208 | Andrew Waterman | 1 | -0/+1 | |
| 2024-01-29 | Remark that implicit accesses are unaffected by MAG | Andrew Waterman | 1 | -1/+1 | |
| 2024-01-29 | Remove Zam; define misaligned atomicity granule PMA (#1206) | Andrew Waterman | 8 | -106/+60 | |
| * Excise Zam extension * Define the misaligned atomicity granule PMA | |||||
| 2024-01-29 | Attempts to access non-existent CSRs are reserved (#1207) | Andrew Waterman | 2 | -4/+7 | |
| Resolves #1116 | |||||
| 2024-01-29 | Clarifications to the Addressing and Memory Protection section (#1142) | Ved Shanbhogue | 1 | -18/+48 | |
| * updating with all clarifications in Svadu to section 5.3.1 * remove repeated sentence * simplify sentence | |||||
| 2024-01-29 | Merge pull request #1208 from ved-rivos/trap_handler_guidelines | Andrew Waterman | 1 | -0/+13 | |
| Add note to guide trap handler design | |||||
| 2024-01-29 | Add note about trap handlers | Ved Shanbhogue | 1 | -0/+13 | |
| 2024-01-28 | Merge pull request #1204 from riscv/mxl-read-only | Andrew Waterman | 3 | -32/+22 | |
| Redefine MXL to be read-only | |||||
| 2024-01-26 | Bump priv spec version and add AsciiDoc note to changelog | Andrew Waterman | 1 | -1/+2 | |
| 2024-01-26 | Redefine MXL to be read-only | Andrew Waterman | 3 | -32/+22 | |
| 2024-01-25 | Merge pull request #1202 from kbroch-rivosinc/fix-alloy-link | Bill Traynor | 1 | -1/+1 | |
| 2024-01-24 | fix broken alloy link | Kevin Broch | 1 | -1/+1 | |
| relates to #1201 Signed-off-by: Kevin Broch <kbroch@rivosinc.com> | |||||
| 2024-01-19 | Switch table caption from bottom to top. | Bill Traynor | 1 | -1/+1 | |
| To accommodate multi-page tables, switching table caption to be at the top of the table. Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-01-15 | Update README.md | Rafael Sene | 1 | -0/+4 | |
| Add Repository Activity Add-on as part of README.md Signed-off-by: Rafael Sene <rafael@riscv.org> | |||||
| 2024-01-09 | Fix an tex->adoc translation bug | Andrew Waterman | 1 | -1/+1 | |
| 2024-01-08 | Delete word with inconsistency (#1189) | demin-han | 1 | -1/+1 | |
| Signed-off-by: demin.han <demin.han@starfivetech.com> | |||||
| 2024-01-08 | Update marchid.md (#1188) | saahm | 1 | -0/+1 | |
| Signed-off-by: saahm <50137875+saahm@users.noreply.github.com> | |||||
| 2024-01-05 | Update marchid.md (#1185) | Gabriele Tripi | 1 | -0/+1 | |
| Signed-off-by: Gabriele Tripi <68828254+GabbedT@users.noreply.github.com> | |||||
| 2024-01-04 | Added marchid for RV6 (#1184) | Nikola Lukić | 1 | -0/+1 | |
| Signed-off-by: Nikola Lukić <lukicn@protonmail.com> | |||||
| 2024-01-01 | Add marchid for WIV64 (#1183) | Jesús Sanz del Rey | 1 | -0/+1 | |
| Signed-off-by: Jesús Sanz del Rey <jesussanz2003@gmail.com> | |||||
| 2023-12-31 | Add marchid for Boa-RISC-V (#1182) | Robot | 1 | -0/+1 | |
| Signed-off-by: Robot <julian@scheffers.net> | |||||
| 2023-12-18 | Specify that the supervisor physical address is divided by 4 KiB (#1177) | charlie-rivos | 1 | -1/+1 | |
| It appears that during the conversion from Latex to asciidoc, the 4 KiB divisor for the satp description was dropped. This commit brings it back. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> | |||||
| 2023-12-13 | Restore missing word | Andrew Waterman | 1 | -1/+1 | |
| 2023-12-08 | Add PMM field to *envcfg and mseccfg (#1170) | Andrew Waterman | 7 | -17/+57 | |
| 2023-11-22 | Fix MODE field description of mtvec register (#1165) | Andrei Solodovnikov | 1 | -1/+1 | |
| Fix MODE field description in the mtvec register In Section 1.6, "Exceptions, Traps, and Interrupts" of the unprivileged specification, a distinction is made between exceptions and interrupts. Table 13 in the privileged specification uses the term "exceptions" as a catch-all expression, encompassing both "exceptions and interrupts" which may not be immediately apparent. Reading "exceptions" merely as "exceptions" initially led me to believe that the 0th bit is used to control exception handling behavior, while the 1st bit is used to control interrupt handling behavior. Signed-off-by: Andrei Solodovnikov <VoultBoy@yandex.ru> | |||||
| 2023-11-20 | Application to RISC-V on adding new marchid for CV-Wally from Harvey Mudd ↵ | James E. Stine | 1 | -0/+1 | |
| College, Oklahoma State University and University of Nevada, Las Vegas (#1164) | |||||
| 2023-11-15 | Merge pull request #1162 from OccupyMars2025/patch-1 | Bill Traynor | 1 | -1/+1 | |
| Fix typo: "Sv38" => "Sv48" | |||||
| 2023-11-15 | [typo] Update supervisor.adoc | OccupyMars2025 | 1 | -1/+1 | |
| Signed-off-by: OccupyMars2025 <31559413+OccupyMars2025@users.noreply.github.com> | |||||
| 2023-11-13 | Fix asciidoc representation of HLV[X] instructions | Andrew Waterman | 1 | -4/+4 | |
| cc @jhauser-us | |||||
| 2023-11-08 | Drop notes on obsoleted user-mode software interrupts (#1159) | yf13 | 1 | -8/+0 | |
| Resolves #1158 | |||||
| 2023-10-31 | Fixing CSR Listing table 3 wrapping. | Bill Traynor | 1 | -196/+44 | |
| Fixed row wrapping so table matches original LaTeX table formatting. | |||||
| 2023-10-30 | Reserve interrupt 13 for Sscofpmf | Andrew Waterman | 4 | -3/+19 | |
| Resolves #1127 Note, I only reserved the pattern in the various cause registers; I did not update the various ip/ie registers. That work is left for whoever integrates Sscofpmf into this document. Reserving the cause patterns has the same architectural effect in the near term. | |||||
| 2023-10-30 | Clarify meaning of "platform or custom use" | Andrew Waterman | 4 | -4/+9 | |
| Resolves #1128 | |||||
| 2023-10-30 | Define the RV32-only medelegh CSR (#1109) | Andrew Waterman | 6 | -17/+37 | |
| * Define the RV32-only medelegh CSR * Define the RV32-only hedelegh CSR | |||||
| 2023-10-30 | Fix typos in D-ext chapter | Andrew Waterman | 1 | -3/+3 | |
| Supersedes #1155 | |||||
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index : riscv-isa-manual.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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