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path: root/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
AgeCommit message (Expand)AuthorFilesLines
13 days[NFC][DecoderEmitter] Code cleanup in `DecoderEmitter::emitTable` (#158014)Rahul Joshi1-0/+1
2025-09-05[Hexagon] Remove post-decoding instruction adjustments (#156359)Sergei Barannikov1-52/+13
2025-08-21[NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file ...Rahul Joshi1-0/+1
2025-08-16[Hexagon] Add missing operand when disassembling Y4_crswap10 (#153849)Sergei Barannikov1-0/+3
2025-07-18[Hexagon][llvm-objdump] Improve disassembly of Hexagon bundles (#145807)quic-areg1-24/+85
2025-06-17[llvm] annotate interfaces in llvm/Target for DLL export (#143615)Andrew Rogers1-1/+3
2025-02-11[Hexagon][Disassembler] Set CommentStream of Disassembler (#126766)quic-areg1-2/+4
2024-11-17[Hexagon] Remove unused includes (NFC) (#116529)Kazu Hirata1-1/+0
2024-09-28[Hexagon] Use MCRegister. NFCCraig Topper1-4/+5
2024-01-18[Hexagon] Flip subreg bit for reverse pairs hvx .new (#75873)quic-akaryaki1-0/+2
2023-02-17Simplify with hasFeature. NFCFangrui Song1-1/+1
2022-11-26[llvm] Use std::size (NFC)Kazu Hirata1-2/+2
2022-09-08[llvm] Use std::size instead of llvm::array_lengthofJoe Loser1-4/+4
2022-05-25[MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand()Maksim Panchenko1-1/+2
2022-05-15Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`Sheng1-1/+1
2022-03-25[Disassember][NFCI] Use strong type for instruction decoderMaksim Panchenko1-74/+81
2022-01-26Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C...Benjamin Kramer1-4/+4
2022-01-26Rename llvm::array_lengthof into llvm::size to match std::size from C++17serge-sans-paille1-4/+4
2021-10-14[hexagon] Add system register, transfer supportBrian Cain1-0/+79
2021-10-08Move TargetRegistry.(h|cpp) from Support to MCReid Kleckner1-1/+1
2021-05-30[NFCI] Move DEBUG_TYPE definition below #includesMindong Chen1-2/+2
2020-08-03[MC] Fix memory leak when allocating MCInst with bump allocatorhgreving1-3/+3
2020-02-14[Hexagon] v67+ HVX register pairs should support either directionBrian Cain1-8/+16
2020-01-21[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)Krzysztof Parzyszek1-1/+4
2020-01-14CMake: Make most target symbols hidden by defaultTom Stellard1-1/+1
2020-01-11[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song1-8/+7
2019-06-11Revert CMake: Make most target symbols hidden by defaultTom Stellard1-1/+1
2019-06-10CMake: Make most target symbols hidden by defaultTom Stellard1-1/+1
2019-05-14[Hexagon] Create a TargetInfo header. NFCRichard Trieu1-0/+1
2019-01-31[Hexagon] Rename textually included file from .h to .incRichard Trieu1-1/+1
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-12-05[Hexagon] Foundation of support for Hexagon V66Krzysztof Parzyszek1-0/+16
2018-12-03[Hexagon] Extract operand decoders into a separate file, NFCKrzysztof Parzyszek1-56/+1
2018-09-10[Target] Untangle disassemblersBenjamin Kramer1-1/+0
2018-05-01Remove \brief commands from doxygen comments.Adrian Prantl1-1/+1
2018-03-01[Hexagon] Add guest registersKrzysztof Parzyszek1-0/+58
2017-12-14Remove a non-modular header (& inline it into its one use)David Blaikie1-3/+55
2017-12-11[Hexagon] Add support for Hexagon V65Krzysztof Parzyszek1-93/+126
2017-10-25Hexagon: Fold a single-use textual header into its useDavid Blaikie1-15/+56
2017-09-15[Hexagon] Switch to parameterized register classes for HVXKrzysztof Parzyszek1-19/+19
2017-07-26[Hexagon] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko1-36/+36
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth1-3/+3
2017-05-05[Hexagon] Remove C6 and C7 as separate registersKrzysztof Parzyszek1-1/+1
2017-05-01[Hexagon] Improve shuffle error reportingKrzysztof Parzyszek1-1/+2
2017-04-06[Hexagon] Change the vector scaling for vector offsetsKrzysztof Parzyszek1-15/+1
2017-02-22[Hexagon] Implement @llvm.readcyclecounter()Krzysztof Parzyszek1-2/+2
2017-02-10[Hexagon] Introduce Hexagon V62Krzysztof Parzyszek1-14/+22
2017-02-10[Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek1-1137/+177
2017-02-02[Hexagon] Rename TypeCOMPOUND to TypeCJKrzysztof Parzyszek1-1/+1
2016-12-13[Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko1-60/+45
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