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2026-02-12[Hexagon] Add support for V128i1/V64i1/V32i1 predicate store/load in HVX (#18...pkarveti2-1/+133
2026-02-09[Hexagon] Fix encoding of packets with fixups followed by alignment (#179168)Brian Cain1-0/+7
2026-02-06[Hexagon] Add post-RA live variables analysis (#179531)Fateme Hosseini5-0/+1061
2026-02-06[Hexagon] Add global region scaffolding (#179541)Fateme Hosseini3-0/+362
2026-02-04[Hexagon] Fix use-after-poison in balanceSubTree (#179239)Brian Cain1-19/+69
2026-02-04[perf] Replace copy-assign by move-assign in llvm/lib/Target (#179464)serge-sans-paille1-1/+1
2026-02-04[HEXAGON] Extend/Truncate the shift amount into i32 (#179499)Abinaya Saravanan1-2/+11
2026-02-02[CodeGen] Refactor targets to override the new getTgtMemIntrinsic overload (N...Nicolai Hähnle2-14/+13
2026-02-01[NewPM] Port MachineDominanceFrontierAnalysis (#177709)Anshul Nigham2-6/+6
2026-02-01[Hexagon] Track type locally in HexagonVectorCombine (#179066)Jameson Nash1-8/+8
2026-01-27[TTI] Add VectorInstrContext for context-aware insert/extract costs. (#175982)Florian Hahn2-10/+9
2026-01-23[NFC][MI] Tidy Up RegState enum use (2/2) (#177090)Sam Elliott13-93/+94
2026-01-20[Hexagon[ Optimize HVXVectorCombine:Limit Conversion for Unaligned Loads (#17...Fateme Hosseini1-2/+8
2026-01-20[Hexagon] Don't run hexagon-loop-idiom and hexagon-vlcr passes at O0 pipeline...pkarveti1-2/+4
2026-01-19[HexagonConstantPropagation] Use getSigned() (#176715)Nikita Popov1-1/+2
2026-01-16Reland "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176277)Sam Elliott1-2/+2
2026-01-16Hexagon: Avoid using getLibcallName for special memcpy (#176374)Matt Arsenault1-4/+7
2026-01-16DAG: Avoid querying libcall info from TargetLowering (#176268)Matt Arsenault1-2/+2
2026-01-15[NFC][TargetLowering] Make shouldExpandAtomicRMWInIR and shouldExpandAtomicCm...Akshay Deodhar2-3/+3
2026-01-15[Hexagon] Enable Machine Combiner pass. (#169434)Sumanth Gundapaneni3-0/+28
2026-01-15Revert "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176190)Sam Elliott1-2/+2
2026-01-15[NFC][MI] Tidy Up RegState enum use (1/2) (#176091)Sam Elliott1-2/+2
2026-01-13[Hexagon] Fix PIC crash when lowering HVX vector constants (#175413)Fateme Hosseini1-4/+6
2026-01-13[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subr...Christudasan Devadasan2-2/+2
2026-01-11[TargetLowering] Change the `softPromoteHalfType` default to `true` (#175149)Trevor Gross1-1/+0
2026-01-09[CodeGen] Generalise Hexagon flags for memop inline thresholds (#172829)Ties Stuij1-31/+6
2026-01-05[NFC][Hexagon] Fix unused variable warning (#174466)Aiden Grossman1-2/+3
2026-01-05Honor alignment for HVX masked loads/stores (incl. loops) (#174419)Fateme Hosseini1-41/+311
2025-12-31[Hexagon] TableGen-erate SDNode descriptions (#168272)Sergei Barannikov6-162/+143
2025-12-21[Hexagon] Silence warnings with MSVCAlexandre Ganea1-2/+3
2025-12-16[CodeGen] expand-fp: Change frem expansion criterion (#158285)Frederik Harwath1-5/+5
2025-12-11[Hexagon] Add HVX patterns for vector arithmetic (#170704)Fateme Hosseini2-0/+65
2025-12-11[Hexagon] Fix HWBF16 PatLeaf type (#170560)Fateme Hosseini2-1/+13
2025-12-11[SCEVExp] Get DL from SE, strip constructor arg (NFC) (#171823)Ramkumar Ramachandra1-1/+1
2025-12-10Revert "[Hexagon] Passes for widening vector operations and shuffle o… (#17...Brian Cain14-2741/+17
2025-12-09[ADT] BitVector: give `subsetOf(RHS)` name to `!test(RHS)` (NFC) (#170875)Anatoly Trosinenko2-4/+2
2025-12-09[Hexagon] Use getSigned() for signed valueNikita Popov1-1/+1
2025-12-09[Hexagon] Simplify creation of splat value (NFC)Nikita Popov1-5/+3
2025-12-09[Hexagon] Avoid unnecessary by reference passing (NFC)Nikita Popov1-6/+5
2025-12-09[Hexagon] Remove unnecessarily complicated helpers (NFC)Nikita Popov1-43/+12
2025-12-09[llvm] Use ConstantInt::getAllOnesValue()Nikita Popov1-1/+1
2025-12-08HexagonGenWideningVecInstr.cpp - fix MSVC "result of 32-bit shift implicitly ...Simon Pilgrim1-1/+1
2025-12-04[Hexagon] Fix assignment (#170646)Konrad Kleine1-3/+3
2025-12-04[Hexagon] Fix assert: = -> == (#170643)Konrad Kleine1-1/+1
2025-12-03[Hexagon] Passes for widening vector operations and shuffle opt (#169559)Fateme Hosseini14-25/+2751
2025-12-03[Hexagon] Add an option to use fast FP to int convert for some HVX cases (#16...Fateme Hosseini1-0/+30
2025-12-03[Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs ...Shih-Po Hung2-18/+0
2025-12-03[TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (#168650)Shih-Po Hung2-10/+7
2025-12-02[NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter ...Robert Imschweiler2-2/+2
2025-11-26CodeGen: Make all targets override pseudos with pointers (#159881)Matt Arsenault1-0/+2
generated by cgit v1.2.3 (git 2.39.1) at 2026-05-16 11:21:02 +0000