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13 hoursaarch64: Fix sve2p1 ld[1-4]/st[1-4]q instruction operands.Srinath Parvathaneni1-3/+1
13 hoursaarch64: Fix sve2p1 extq instruction operands.Srinath Parvathaneni1-1/+1
13 hoursaarch64: Fix sve2p1 dupq instruction operands.Srinath Parvathaneni1-1/+1
13 hoursaarch64: Enable mandatory feature bits for v9.4-A.Srinath Parvathaneni1-1/+2
28 hoursgdb: LoongArch: Add support for hardware breakpointHui Li1-0/+2
28 hoursgdb: LoongArch: Add support for hardware watchpointHui Li1-0/+2
34 hoursaarch64: Add SME FP8 multiplication instructionsAndrew Carlotti1-0/+11
34 hoursaarch64: Add FP8 Neon and SVE multiplication instructionsAndrew Carlotti1-6/+31
36 hoursgas, aarch64: Add SME2 lutv2 extensionsaurabh.jha@arm.com1-0/+6
3 daysaarch64: Enable +cssc for armv8.9-aAndrew Carlotti1-0/+1
8 dayslibctf, include: new functions for looking up enumeratorsNick Alcock1-0/+38
8 daysinclude: libctf: comment improvementsNick Alcock1-2/+5
8 dayslibctf: prohibit addition of enums with overlapping enumerator constantsNick Alcock1-6/+7
8 daysinclude: fix libctf ECTF_NOENUMNAM error messageNick Alcock1-1/+1
8 daysRISC-V: Add SiFive cease extension v1.0Hau Hsu2-0/+4
8 daysRISC-V: Support Zacas extension.Gianluca Guida2-0/+12
12 daysAdd --rosegment option to BFD linker to stop the '-z separate-code' from gene...Nick Clifton1-0/+3
13 daysMIPS/opcodes: Rework INSN_* flags into a consistent blockMaciej W. Rozycki1-28/+25
13 daysMIPS/opcodes: Update INSN_CHIP_MASK for INSN_ALLEGREXMaciej W. Rozycki1-1/+1
13 daysaarch64: add Branch Record Buffer extension instructionsClaudio Bantaloukas1-1/+6
2024-06-12RISC-V: Support S[sm]csrind extension csrs.Jiawei1-6/+40
2024-06-06RISC-V: Add support for Zvfbfwma extensionXiao Zeng2-0/+9
2024-06-06RISC-V: Add support for Zvfbfmin extensionXiao Zeng2-0/+9
2024-06-06RISC-V: Add support for Zfbfmin extensionXiao Zeng2-0/+9
2024-06-05arm: remove disassembly support for the FPA co-processorRichard Earnshaw1-4/+3
2024-06-05arm: remove options to select the FPARichard Earnshaw1-3/+0
2024-06-05arm: rename FPU_ARCH_VFP to FPU_ARCH_SOFTVFPRichard Earnshaw1-1/+1
2024-06-05RISC-V: Add support for XCVmem extension in CV32E40PMary Bennett2-0/+50
2024-06-05RISC-V: Add support for XCVbi extension in CV32E40PMary Bennett2-0/+9
2024-06-05RISC-V: Add support for XCVelw extension in CV32E40PMary Bennett2-0/+4
2024-05-28gas, aarch64: Add SVE2 lut extensionsaurabh.jha@arm.com1-0/+3
2024-05-28gas, aarch64: Add AdvSIMD lut extensionsaurabh.jha@arm.com1-1/+8
2024-05-28Add new ELF section and segment types to readelf.Nick Clifton10-89/+134
2024-05-21include, libctf: improve documentationNick Alcock1-32/+62
2024-05-20readelf: add pretty printing for FDO Dlopen Metadata noteLuca Boccassi1-0/+3
2024-05-17include, libctf: add a bunch of documentation to ctf-api.hNick Alcock1-50/+418
2024-05-16aarch64: fp8 convert and scale - add feature flags and related structuresVictor Do Nascimento1-0/+2
2024-05-16aarch64: add SPMU feature and its associated registersMatthieu Longo1-0/+3
2024-05-14arm: remove Maverick support from BFD.Richard Earnshaw1-1/+1
2024-05-14arm: opcodes: remove Maverick disassembly.Richard Earnshaw1-5/+3
2024-05-08RISC-V: Support B, Zaamo and Zalrsc extensions.Nelson Chu1-1/+2
2024-04-20LoongArch: Add -mignore-start-align optionmengqinggang1-0/+1
2024-04-17aarch64: Remove asserts from operand qualifier decoders [PR31595]Victor Do Nascimento1-0/+3
2024-04-09RISC-V: Support Zcmp push/pop instructions.Jiawei2-0/+32
2024-04-07gdb: ignore -Wregister instead of -Wdeprecated-registerSimon Marchi2-6/+12
2024-03-28RISC-V: Removed privileged spec 1.9.1 support in assembler.Nelson Chu1-204/+185
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha1-0/+2
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev1-0/+3
2024-03-08RISC-V: Support Zabha extension.Jiawei2-0/+55
2024-03-01s390: Warn when register name type does not match operandJens Remus1-0/+3
generated by cgit v1.1 at 2024-06-26 01:36:57 +0000