| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-08-31 | [AArch64] Rename cmp_result iterator | Richard Sandiford | 1 | -19/+19 |
| 2017-08-31 | [AArch64] Remove use of wider vector modes | Richard Sandiford | 1 | -15/+0 |
| 2017-08-01 | re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b... | Jakub Jelinek | 1 | -0/+11 |
| 2017-07-28 | aarch64.md (mov<mode>): Generalize. | Tamar Christina | 1 | -0/+3 |
| 2017-03-16 | [AArch64] Use 'x' constraint for vector HFmode multiplication by indexed elem... | Kyrylo Tkachov | 1 | -2/+2 |
| 2017-03-09 | [AArch64] PR target/79913: VEC_SELECT bugs in aarch64 patterns | Kyrylo Tkachov | 1 | -1/+4 |
| 2017-01-20 | [AArch64][1/4] Support Return address protection on AArch64 | Jiong Wang | 1 | -0/+16 |
| 2017-01-01 | Update copyright years. | Jakub Jelinek | 1 | -1/+1 |
| 2016-11-23 | 2016-11-22 Michael Collison <michael.collison@arm.com> | Michael Collison | 1 | -0/+3 |
| 2016-08-10 | iterators.md (V_cmp_mixed, [...]): New. | Bin Cheng | 1 | -0/+10 |
| 2016-08-02 | [PATCH AArch64] Add more AArch64 NEON intrinsics | Tamar Christina | 1 | -11/+8 |
| 2016-07-28 | On AArch64 the UXTB and UXTH instructions are aliases of UBFM, | Wilco Dijkstra | 1 | -3/+0 |
| 2016-07-25 | [AArch64][8/10] ARMv8.2-A FP16 two operands scalar intrinsics | Jiong Wang | 1 | -6/+5 |
| 2016-07-25 | [AArch64][7/10] ARMv8.2-A FP16 one operand scalar intrinsics | Jiong Wang | 1 | -10/+22 |
| 2016-07-25 | [AArch64][6/14] ARMv8.2-A FP16 reduction vector intrinsics | Jiong Wang | 1 | -2/+5 |
| 2016-07-25 | [AArch64][5/10] ARMv8.2-A FP16 lane vector intrinsics | Jiong Wang | 1 | -1/+6 |
| 2016-07-25 | [AArch64][3/10] ARMv8.2-A FP16 two operands vector intrinsics | Jiong Wang | 1 | -0/+10 |
| 2016-07-25 | [AArch64][2/10] ARMv8.2-A FP16 one operand vector intrinsics | Jiong Wang | 1 | -4/+29 |
| 2016-06-08 | [AArch64, 2/6] Reimplement vector fixed-point intrinsics | Jiong Wang | 1 | -0/+8 |
| 2016-06-08 | [AArch64, 1/6] Reimplement scalar fixed-point intrinsics | Jiong Wang | 1 | -2/+13 |
| 2016-05-31 | [AArch64] Remove aarch64_simd_attr_length_move | Kyrylo Tkachov | 1 | -0/+1 |
| 2016-01-28 | re PR target/69305 (wrong code with -O and int128 @ aarch64) | Richard Henderson | 1 | -0/+3 |
| 2016-01-11 | [AArch64] PR rtl-optimization/68796: Add patterns for QImode and HImode compa... | Kyrylo Tkachov | 1 | -0/+2 |
| 2016-01-04 | Update copyright years. | Jakub Jelinek | 1 | -1/+1 |
| 2015-12-02 | aarch64.md: New pattern. | David Sherwood | 1 | -0/+10 |
| 2015-11-26 | [AArch64] Add sqrdmah, sqrdmsh instructions. | Matthew Wahab | 1 | -0/+6 |
| 2015-11-25 | 2015-11-24 Michael Collison <michael.collison@linaro.org> | Michael Collison | 1 | -0/+12 |
| 2015-11-24 | [AArch64][v2] Improve comparison with complex immediates followed by branch/cset | Kyrylo Tkachov | 1 | -1/+2 |
| 2015-11-10 | [AArch64] Move iterators from atomics.md to iterators.md | Matthew Wahab | 1 | -0/+33 |
| 2015-11-10 | [AArch64][2/3] Implement negcc, notcc optabs | Kyrylo Tkachov | 1 | -0/+6 |
| 2015-11-03 | [AARCH64][PATCH 1/3] Implementing the variants of the vmulx_ NEON intrinsic | Bilyan Borisov | 1 | -0/+1 |
| 2015-10-12 | [AArch64_be] Fix vtbl[34] and vtbx4 | Christophe Lyon | 1 | -0/+1 |
| 2015-10-06 | iterators.md (vwcore): Add missing cases for V4HF/V8HF modes. | Kugan Vivekanandarajah | 1 | -0/+1 |
| 2015-09-15 | [AArch64 array_mode 7/8] Combine the expanders using VSTRUCT:nregs | Alan Lawrence | 1 | -0/+3 |
| 2015-09-15 | [AArch64 array_mode 6/8] Remove V_TWO_ELEM, again using BLKmode + set_mem_size. | Alan Lawrence | 1 | -10/+0 |
| 2015-09-15 | [AArch64 array_mode 5/8] Remove V_FOUR_ELEM, again using BLKmode + set_mem_size. | Alan Lawrence | 1 | -10/+0 |
| 2015-09-15 | [AArch64 array_mode 3/8] Stop using EImode in aarch64-simd.md and iterators.md | Alan Lawrence | 1 | -9/+0 |
| 2015-09-15 | [AArch64 array_mode 2/8] Remove VSTRUCT_DREG, use BLKmode for d-reg aarch64_s... | Alan Lawrence | 1 | -2/+0 |
| 2015-09-14 | [AArch64] Handle literal pools for functions > 1 MiB in size. | Ramana Radhakrishnan | 1 | -0/+3 |
| 2015-09-11 | Remove separate movtf pattern - Use an iterator for all FP modes. | Ramana Radhakrishnan | 1 | -2/+2 |
| 2015-09-08 | [AArch64] Add vcvt(_high)?_f32_f16 intrinsics, with BE RTL fix | Alan Lawrence | 1 | -5/+13 |
| 2015-09-08 | [AArch64] Improve code generation for float16 vector code | Alan Lawrence | 1 | -1/+6 |
| 2015-09-08 | [AArch64] Implement vcvt_{,high_}f16_f32 | Alan Lawrence | 1 | -1/+9 |
| 2015-09-08 | [AArch64] vld{2,3,4}{,_lane,_dup}, vcombine, vcreate | Alan Lawrence | 1 | -6/+12 |
| 2015-09-08 | [AArch64] Add support for float16x{4,8}_t vectors/builtins | Alan Lawrence | 1 | -8/+28 |
| 2015-08-27 | aarch64.md (*condjump): Handle functions > 1 MiB. | Thomas Preud'homme | 1 | -0/+6 |
| 2015-08-14 | re PR target/67143 (ICE (could not split insn) on aarch64-linux-gnu) | Matthew Wahab | 1 | -3/+10 |
| 2015-07-30 | [AArch64] Removed unused VRL2/3/4 iterator values | Alan Lawrence | 1 | -12/+3 |
| 2015-07-29 | [AArch64] Add basic FP16 support | Alan Lawrence | 1 | -0/+3 |
| 2015-06-26 | [AArch64][2/2] Implement -fpic for -mcmodel=small | Jiong Wang | 1 | -0/+4 |
