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| author | Tamar Christina <tamar.christina@arm.com> | 2016-08-02 09:25:19 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2016-08-02 09:25:19 +0000 |
| commit | 1efafef383b156074d4bd5ed35f656a509c7bf7a (patch) | |
| tree | 03746c0e2e5243b1dad9f050a454caff5e255376 /gcc/config/aarch64/iterators.md | |
| parent | 0b953808f4395ee3e5f31a8355b200142ab30cd6 (diff) | |
| download | gcc-1efafef383b156074d4bd5ed35f656a509c7bf7a.zip gcc-1efafef383b156074d4bd5ed35f656a509c7bf7a.tar.gz gcc-1efafef383b156074d4bd5ed35f656a509c7bf7a.tar.bz2 | |
[PATCH AArch64] Add more AArch64 NEON intrinsics
Add vmaxnm_f64, vminnm_f64, vmax_f64, vmin_f64.
Committed on behalf of Tamar Christina <tamar.christina@arm.com> .
gcc/
* config/aarch64/aarch64-simd-builtins.def
(__builtin_aarch64_fmindf): Change BUILTIN_VDQF to BUILTIN_VDQF_DF.
(__builtin_aarch64_fmaxdf): Likewise.
(__builtin_aarch64_smin_nandf): Likewise.
(__builtin_aarch64_smax_nandf): Likewise.
* config/aarch64/aarch64-simd.md (<fmaxmin><mode>3): Remove.
* config/aarch64/aarch64.md (<fmaxmin><mode>3): Rename to...
(<fmaxmin><mode>3): ...this.
* config/aarch64/arm_neon.h (vmaxnm_f64): New.
(vminnm_f64): Likewise.
(vmin_f64): Likewise.
(vmax_f64): Likewise.
* config/aarch64/iterators.md (FMAXMIN): Merge with...
(FMAXMIN_UNS): ...this.
(fmaxmin): Merged with
(fmaxmin_op): ...this...
(maxmin_uns_op): ...in to this.
gcc/testsuite/
* gcc.target/aarch64/vminmaxnm.c: New.
* gcc.target/aarch64/simd/vminmaxnm_1.c (main): Added float64x1_t
tests.
From-SVN: r238977
Diffstat (limited to 'gcc/config/aarch64/iterators.md')
| -rw-r--r-- | gcc/config/aarch64/iterators.md | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 5e8b0ad..187057f 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -1016,9 +1016,8 @@ (define_int_iterator ADDSUBHN2 [UNSPEC_ADDHN2 UNSPEC_RADDHN2 UNSPEC_SUBHN2 UNSPEC_RSUBHN2]) -(define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN]) - -(define_int_iterator FMAXMIN [UNSPEC_FMAXNM UNSPEC_FMINNM]) +(define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN + UNSPEC_FMAXNM UNSPEC_FMINNM]) (define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH]) @@ -1102,7 +1101,9 @@ (UNSPEC_FMAXV "smax_nan") (UNSPEC_FMIN "smin_nan") (UNSPEC_FMINNMV "smin") - (UNSPEC_FMINV "smin_nan")]) + (UNSPEC_FMINV "smin_nan") + (UNSPEC_FMAXNM "fmax") + (UNSPEC_FMINNM "fmin")]) (define_int_attr maxmin_uns_op [(UNSPEC_UMAXV "umax") (UNSPEC_UMINV "umin") @@ -1113,13 +1114,9 @@ (UNSPEC_FMAXV "fmax") (UNSPEC_FMIN "fmin") (UNSPEC_FMINNMV "fminnm") - (UNSPEC_FMINV "fmin")]) - -(define_int_attr fmaxmin [(UNSPEC_FMAXNM "fmax") - (UNSPEC_FMINNM "fmin")]) - -(define_int_attr fmaxmin_op [(UNSPEC_FMAXNM "fmaxnm") - (UNSPEC_FMINNM "fminnm")]) + (UNSPEC_FMINV "fmin") + (UNSPEC_FMAXNM "fmaxnm") + (UNSPEC_FMINNM "fminnm")]) (define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u") (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur") |