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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-08-31 09:52:38 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-08-31 09:52:38 +0000 |
commit | 5f5653148b94593632986155b4f283150c52b83d (patch) | |
tree | 09707ac100dab3e250a34d0cf6c85a73f71f008b /gcc/config/aarch64/iterators.md | |
parent | fca7d0a4fdd5a107429f3424600cfcb24b068bac (diff) | |
download | gcc-5f5653148b94593632986155b4f283150c52b83d.zip gcc-5f5653148b94593632986155b4f283150c52b83d.tar.gz gcc-5f5653148b94593632986155b4f283150c52b83d.tar.bz2 |
[AArch64] Rename cmp_result iterator
The comparison results provided by the V_cmp_result/v_cmp_result
attribute were simply the corresponding integer vector. We'd also
like to have easy access to the integer vector for SVE, but using
"cmp_result" would be confusing because SVE comparisons return
predicates instead of vectors. This patch therefore renames the
attributes to the more general V_INT_EQUIV/v_int_equiv instead.
As to the capitalisation: there are already many iterators that use
all lowercase vs. all uppercase names to distinguish all lowercase
vs. all uppercase expansions (e.g. fcvt_target and FCVT_TARGET).
It's also the convention used for the built-in mode/MODE/code/CODE/etc.
attributes. IMO those names are easier to read at a glance, rather than
relying on a single letter's difference.
2017-08-22 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/iterators.md (V_cmp_result): Rename to...
(V_INT_EQUIV): ...this.
(v_cmp_result): Rename to...
(v_int_equiv): ...this.
* config/aarch64/aarch64.md (xorsign<mode>3): Update accordingly.
* config/aarch64/aarch64-simd.md (xorsign<mode>3): Likewise.
(copysign<mode>3): Likewise.
(aarch64_simd_bsl<mode>_internal): Likewise.
(aarch64_simd_bsl<mode>): Likewise.
(vec_cmp<mode><mode>): Likewise.
(vcond<mode><mode>): Likewise.
(vcond<v_cmp_mixed><mode>): Likewise.
(vcondu<mode><v_cmp_mixed>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
(aarch64_cmtst<mode>): Likewise.
(aarch64_fac<optab><mode>): Likewise.
(vec_perm_const<mode>): Likewise.
(vcond_mask_<mode><v_cmp_result>): Rename to...
(vcond_mask_<mode><v_int_equiv>): ...this.
(vec_cmp<mode><v_cmp_result>): Rename to...
(vec_cmp<mode><v_int_equiv>): ...this.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251556
Diffstat (limited to 'gcc/config/aarch64/iterators.md')
-rw-r--r-- | gcc/config/aarch64/iterators.md | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index c8cb54f..3e38767 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -662,25 +662,25 @@ ;; Double vector types for ALLX. (define_mode_attr Vallxd [(QI "8b") (HI "4h") (SI "2s")]) -;; Mode of result of comparison operations. -(define_mode_attr V_cmp_result [(V8QI "V8QI") (V16QI "V16QI") - (V4HI "V4HI") (V8HI "V8HI") - (V2SI "V2SI") (V4SI "V4SI") - (DI "DI") (V2DI "V2DI") - (V4HF "V4HI") (V8HF "V8HI") - (V2SF "V2SI") (V4SF "V4SI") - (V2DF "V2DI") (DF "DI") - (SF "SI") (HF "HI")]) - -;; Lower case mode of results of comparison operations. -(define_mode_attr v_cmp_result [(V8QI "v8qi") (V16QI "v16qi") - (V4HI "v4hi") (V8HI "v8hi") - (V2SI "v2si") (V4SI "v4si") - (DI "di") (V2DI "v2di") - (V4HF "v4hi") (V8HF "v8hi") - (V2SF "v2si") (V4SF "v4si") - (V2DF "v2di") (DF "di") - (SF "si")]) +;; Mode with floating-point values replaced by like-sized integers. +(define_mode_attr V_INT_EQUIV [(V8QI "V8QI") (V16QI "V16QI") + (V4HI "V4HI") (V8HI "V8HI") + (V2SI "V2SI") (V4SI "V4SI") + (DI "DI") (V2DI "V2DI") + (V4HF "V4HI") (V8HF "V8HI") + (V2SF "V2SI") (V4SF "V4SI") + (V2DF "V2DI") (DF "DI") + (SF "SI") (HF "HI")]) + +;; Lower case mode with floating-point values replaced by like-sized integers. +(define_mode_attr v_int_equiv [(V8QI "v8qi") (V16QI "v16qi") + (V4HI "v4hi") (V8HI "v8hi") + (V2SI "v2si") (V4SI "v4si") + (DI "di") (V2DI "v2di") + (V4HF "v4hi") (V8HF "v8hi") + (V2SF "v2si") (V4SF "v4si") + (V2DF "v2di") (DF "di") + (SF "si")]) ;; Mode for vector conditional operations where the comparison has ;; different type from the lhs. |