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Age
Commit message (
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Author
Files
Lines
2022-10-24
x86: fix VENDOR_MAX enum value
Martin Liska
1
-1
/
+3
2022-10-24
RISC-V: Support --target-help for -mcpu/-mtune
Kito Cheng
1
-0
/
+46
2022-10-21
Enable AMD znver4 support and add instruction reservations
Tejas Joshi
3
-28
/
+24
2022-10-21
Support Intel AVX-VNNI-INT8
Kong Lingling
4
-1
/
+26
2022-10-21
Support Intel AVX-IFMA
Hongyu Wang
4
-1
/
+23
2022-10-17
Enable REE for H8
Jeff Law
1
-0
/
+2
2022-10-17
Initial Meteorlake Support
Hu, Lin1
2
-0
/
+6
2022-10-17
Initial Raptorlake Support
Haochen Jiang
2
-0
/
+4
2022-10-10
arc: Remove obsolete mRcq and mRcw options.
Claudiu Zissulescu
1
-2
/
+0
2022-09-29
aarch64: Tweak handling of -mgeneral-regs-only
Richard Sandiford
1
-0
/
+12
2022-09-29
aarch64: Tweak contents of flags_on/off fields
Richard Sandiford
1
-8
/
+6
2022-09-29
aarch64: Make more use of aarch64_feature_flags
Richard Sandiford
1
-9
/
+10
2022-09-29
aarch64: Tweak constness of option-related data
Richard Sandiford
1
-13
/
+13
2022-09-29
aarch64: Avoid std::string in static data
Richard Sandiford
1
-2
/
+2
2022-09-29
aarch64: Simplify generation of .arch strings
Richard Sandiford
1
-196
/
+47
2022-09-29
aarch64: Simplify feature definitions
Richard Sandiford
1
-11
/
+18
2022-09-29
aarch64: Avoid redundancy in aarch64-cores.def
Richard Sandiford
1
-1
/
+1
2022-09-29
aarch64: Add "V" to aarch64-arches.def names
Richard Sandiford
1
-1
/
+1
2022-09-29
aarch64: Rename AARCH64_FL_FOR_ARCH macros
Richard Sandiford
1
-1
/
+1
2022-09-29
aarch64: Rename AARCH64_ISA architecture-level macros
Richard Sandiford
1
-1
/
+1
2022-09-23
RISC-V: Support poly move manipulation and selftests.
zhongjuzhe
1
-1
/
+1
2022-09-09
RISC-V: Suppress build warnings
Kito Cheng
1
-18
/
+18
2022-09-05
RISC-V: Support Zmmul extension
LiaoShihua
1
-0
/
+4
2022-09-02
RISC-V: Implement TARGET_COMPUTE_MULTILIB
Kito Cheng
1
-0
/
+377
2022-09-02
Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.
Kito Cheng
3
-0
/
+51
2022-08-29
s390: Add -munroll-only-small-loops.
Robin Dapp
1
-0
/
+5
2022-08-26
cr16: remove obsoleted port
Martin Liska
1
-27
/
+0
2022-08-16
RISC-V: Support zfh and zfhmin extension
Kito Cheng
1
-0
/
+8
2022-08-15
xtensa: Turn on -fsplit-wide-types-early by default
Takayuki 'January June' Suwa
1
-0
/
+2
2022-07-26
LoongArch: Support split symbol.
Lulu Cheng
1
-0
/
+1
2022-07-03
loongarch: use -mno-check-zero-division as the default for optimized code
Xi Ruoyao
1
-3
/
+0
2022-07-01
i386: Add AVX512BW to AVX512F in MASK_ISA2
Haochen Jiang
1
-3
/
+2
2022-06-25
Remove long deprecated tilegx and tilepro ports
Jeff Law
2
-112
/
+0
2022-06-13
x86: Require AVX for F16C and VAES
H.J. Lu
1
-4
/
+4
2022-05-24
RISC-V: Add mininal support for Zicbo[mzp]
ShiYulong
1
-0
/
+8
2022-05-23
[x86_64]: Zhaoxin lujiazui enablement
Mayshao
3
-1
/
+64
2022-05-23
RISC-V: Fix canonical extension order (K and J)
Tsukasa OI
1
-1
/
+1
2022-05-16
Use more ARRAY_SIZE.
Martin Liska
1
-2
/
+1
2022-05-11
i386: simplify cpu_feature handling
Martin Liska
1
-22
/
+28
2022-04-12
IBM zSystems: Add support for z16 as CPU name.
Andreas Krebbel
1
-2
/
+2
2022-03-29
LoongArch Port: gcc build
chenglulu
1
-0
/
+43
2022-03-21
x86: Disable SSE in ISA2 for -mgeneral-regs-only
H.J. Lu
1
-1
/
+1
2022-03-21
x86: Properly check FEATURE_AESKLE
H.J. Lu
1
-2
/
+2
2022-03-21
RISC-V: Implement misc macro for vector extensions.
Kito Cheng
1
-8
/
+8
2022-03-16
RISC-V: Add version info for zk, zkn and zks
Kito Cheng
1
-0
/
+4
2022-03-16
RISC-V: Handle combine extension in canonical ordering.
LiaoShihua
1
-0
/
+56
2022-03-04
rs6000: Allow -mlong-double-64 after -mabi={ibm,ieee}longdouble [PR104208, PR...
Peter Bergner
1
-0
/
+10
2022-02-09
i386: -mno-xsave should disable all relevant ISA flags [PR104462]
Uros Bizjak
1
-1
/
+2
2022-01-24
properly disable -fsplit-stack on non-glibc targets [PR104170]
Jakub Jelinek
2
-4
/
+6
2022-01-24
RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0
Kito Cheng
1
-2
/
+12
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