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| author | Richard Sandiford <richard.sandiford@arm.com> | 2022-09-29 11:32:57 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2022-09-29 11:32:57 +0100 |
| commit | 2a269bda9e7b8f9353699d0c965e7e9246500aa0 (patch) | |
| tree | 535c3839b27983c382ecaf009b88f4d013ca5180 /gcc/common | |
| parent | bb7f43b62a58a0f0326fd3060f0bd43e6f3ef971 (diff) | |
| download | gcc-2a269bda9e7b8f9353699d0c965e7e9246500aa0.zip gcc-2a269bda9e7b8f9353699d0c965e7e9246500aa0.tar.gz gcc-2a269bda9e7b8f9353699d0c965e7e9246500aa0.tar.bz2 | |
aarch64: Tweak handling of -mgeneral-regs-only
-mgeneral-regs-only is effectively "+nofp for the compiler without
changing the assembler's ISA flags". Currently that's implemented
by making TARGET_FLOAT, TARGET_SIMD and TARGET_SVE depend on
!TARGET_GENERAL_REGS_ONLY and then making any feature that needs FP
registers depend (directly or indirectly) on one of those three TARGET
macros. The problem is that it's easy to forgot to do the last bit.
This patch instead represents the distinction between "assemnbler
ISA flags" and "compiler ISA flags" more directly, funnelling
all updates through a new function that sets both sets of flags
together.
gcc/
* config/aarch64/aarch64.opt (aarch64_asm_isa_flags): New variable.
* config/aarch64/aarch64.h (aarch64_asm_isa_flags)
(aarch64_isa_flags): Redefine as read-only macros.
(TARGET_SIMD, TARGET_FLOAT, TARGET_SVE): Don't depend on
!TARGET_GENERAL_REGS_ONLY.
* common/config/aarch64/aarch64-common.cc
(aarch64_set_asm_isa_flags): New function.
(aarch64_handle_option): Call it when updating -mgeneral-regs.
* config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Replace
m_old_isa_flags with m_old_asm_isa_flags.
(aarch64_set_asm_isa_flags): Declare.
* config/aarch64/aarch64-builtins.cc
(aarch64_simd_switcher::aarch64_simd_switcher)
(aarch64_simd_switcher::~aarch64_simd_switcher): Save and restore
aarch64_asm_isa_flags instead of aarch64_isa_flags.
* config/aarch64/aarch64-sve-builtins.cc
(check_required_extensions): Use aarch64_asm_isa_flags instead
of aarch64_isa_flags.
* config/aarch64/aarch64.cc (aarch64_set_asm_isa_flags): New function.
(aarch64_override_options, aarch64_handle_attr_arch)
(aarch64_handle_attr_cpu, aarch64_handle_attr_isa_flags): Use
aarch64_set_asm_isa_flags to set the ISA flags.
(aarch64_option_print, aarch64_declare_function_name)
(aarch64_start_file): Use aarch64_asm_isa_flags instead
of aarch64_isa_flags.
(aarch64_can_inline_p): Check aarch64_asm_isa_flags as well as
aarch64_isa_flags.
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/aarch64/aarch64-common.cc | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/common/config/aarch64/aarch64-common.cc b/gcc/common/config/aarch64/aarch64-common.cc index ffa83bb..6100783 100644 --- a/gcc/common/config/aarch64/aarch64-common.cc +++ b/gcc/common/config/aarch64/aarch64-common.cc @@ -64,6 +64,17 @@ static const struct default_options aarch_option_optimization_table[] = { OPT_LEVELS_NONE, 0, NULL, 0 } }; +/* Set OPTS->x_aarch64_asm_isa_flags to FLAGS and update + OPTS->x_aarch64_isa_flags accordingly. */ +void +aarch64_set_asm_isa_flags (gcc_options *opts, aarch64_feature_flags flags) +{ + opts->x_aarch64_asm_isa_flags = flags; + opts->x_aarch64_isa_flags = flags; + if (opts->x_target_flags & MASK_GENERAL_REGS_ONLY) + opts->x_aarch64_isa_flags &= ~feature_deps::get_flags_off (AARCH64_FL_FP); +} + /* Implement TARGET_HANDLE_OPTION. This function handles the target specific options for CPU/target selection. @@ -98,6 +109,7 @@ aarch64_handle_option (struct gcc_options *opts, case OPT_mgeneral_regs_only: opts->x_target_flags |= MASK_GENERAL_REGS_ONLY; + aarch64_set_asm_isa_flags (opts, opts->x_aarch64_asm_isa_flags); return true; case OPT_mfix_cortex_a53_835769: |