index
:
riscv-gnu-toolchain/gcc.git
devel/analyzer
devel/autopar_devel
devel/autopar_europar_2021
devel/bypass-asm
devel/c++-contracts
devel/c++-coroutines
devel/c++-modules
devel/c++-name-lookup
devel/coarray_native
devel/existing-fp8
devel/fortran_unsigned
devel/gccgo
devel/gfortran-caf
devel/gfortran-test
devel/gimple-linterchange
devel/gomp-5_0-branch
devel/icpp2021
devel/ira-select
devel/ix86/evex512
devel/jlaw/crc
devel/loop-unswitch-support-switches
devel/lto-offload
devel/m2link
devel/modula-2
devel/mold-lto-plugin
devel/mold-lto-plugin-v2
devel/nothrow-detection
devel/omp/gcc-10
devel/omp/gcc-11
devel/omp/gcc-12
devel/omp/gcc-13
devel/omp/gcc-14
devel/omp/gcc-15
devel/omp/gcc-9
devel/omp/ompd
devel/power-ieee128
devel/range-gen3
devel/ranger
devel/rust/master
devel/sh-lra
devel/sphinx
devel/ssa-range
devel/subreg-coalesce
devel/unified-autovect
master
releases/egcs-1.0
releases/egcs-1.1
releases/gcc-10
releases/gcc-11
releases/gcc-12
releases/gcc-13
releases/gcc-14
releases/gcc-15
releases/gcc-2.95
releases/gcc-2.95.2.1-branch
releases/gcc-3.0
releases/gcc-3.1
releases/gcc-3.2
releases/gcc-3.3
releases/gcc-3.4
releases/gcc-4.0
releases/gcc-4.1
releases/gcc-4.2
releases/gcc-4.3
releases/gcc-4.4
releases/gcc-4.5
releases/gcc-4.6
releases/gcc-4.7
releases/gcc-4.8
releases/gcc-4.9
releases/gcc-5
releases/gcc-6
releases/gcc-7
releases/gcc-8
releases/gcc-9
releases/libgcj-2.95
trunk
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
gcc
/
common
Age
Commit message (
Expand
)
Author
Files
Lines
2025-11-26
Revert "[PATCH v3] RISC-V: Implement RISC-V profile macro support"
Jeff Law
1
-41
/
+0
2025-11-19
i386: Add AVX10.1, AVX10.2, APX_F and MOVRS to Nova Lake
Haochen Jiang
1
-1
/
+1
2025-11-17
GCC, meet C++20
Jakub Jelinek
1
-2
/
+2
2025-11-11
LoongArch: Implement TARGET_GENERATE_VERSION_DISPATCHER_BODY.
Lulu Cheng
1
-0
/
+41
2025-10-22
Initial Nova Lake Support
Haochen Jiang
3
-0
/
+20
2025-10-15
Initial Wildcat Lake Support
Haochen Jiang
2
-0
/
+4
2025-10-14
i386: Remove AMX-TRANSPOSE support
Haochen Jiang
4
-25
/
+3
2025-10-13
[PATCH v3] RISC-V: Implement RISC-V profile macro support
Zhongyao Chen
1
-0
/
+41
2025-10-11
Allow target to chose address-space for artificial rodata.
Georg-Johann Lay
1
-6
/
+5
2025-10-10
x86: Fixes for AMD znver5 enablement
Umesh Kalvakuntla
1
-1
/
+11
2025-09-15
RISC-V: Configure Profiles definitions in the definition file.
Jiawei
1
-55
/
+9
2025-09-10
AVR: Disable tree-switch-conversion per default.
Georg-Johann Lay
1
-0
/
+7
2025-09-07
RISC-V: Add support for the XAndesvpackfph ISA extension.
Kuan-Lin Chen
1
-1
/
+2
2025-09-06
RISC-V: Add support for the XAndesvbfhcvt ISA extension.
Kuan-Lin Chen
1
-0
/
+2
2025-09-04
RISC-V: Fix extension subset check in riscv_can_inline_p
Kito Cheng
1
-1
/
+1
2025-08-21
pru: Add options to disable MUL/FILL/ZERO instructions
Dimitar Dimitrov
1
-1
/
+2
2025-08-15
RISC-V: Allow errors to be suppressed when parsing architectures
Richard Sandiford
1
-74
/
+95
2025-08-06
RISC-V: Support -march=unset
Kito Cheng
1
-0
/
+5
2025-07-31
AVR: rtl-optimization/121340 - New mini-pass to undo superfluous moves from i...
Georg-Johann Lay
1
-0
/
+1
2025-07-31
libgcc: Update FMV features to latest ACLE spec 2024Q4
Wilco Dijkstra
1
-12
/
+13
2025-07-29
RISC-V: Remove use of structured binding to fix compiler warning
Christoph Müllner
1
-1
/
+2
2025-07-16
i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F
Haochen Jiang
1
-7
/
+6
2025-06-25
x86: Update -mtune=intel for Diamond Rapids/Clearwater Forest
H.J. Lu
1
-1
/
+1
2025-06-25
RISC-V: Add Profiles RVA/B23S64 support.
Jiawei
1
-1
/
+17
2025-06-24
AArch64: propose -mmax-vectorization as an option to override vector costing
Tamar Christina
1
-0
/
+4
2025-06-16
RISC-V: Update Profiles string in RV23.
Jiawei
1
-3
/
+3
2025-06-05
RISC-V: Don't use structured binding in riscv-common.cc
Kito Cheng
1
-9
/
+18
2025-05-23
RISC-V: Support CPUs in -march.
Robin Dapp
1
-7
/
+12
2025-05-19
RISC-V: Fix the warning of temporary object dangling references.
Dongyan Chen
1
-2
/
+2
2025-05-19
i386: Remove avx10.1-256/512 and evex512 options
Haochen Jiang
4
-67
/
+21
2025-05-14
RISC-V: Fix uninit riscv_subset_list::m_allow_adding_dup issue
Kito Cheng
1
-1
/
+1
2025-05-13
RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data
Kito Cheng
1
-194
/
+27
2025-05-13
RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data
Kito Cheng
1
-250
/
+22
2025-05-13
RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_...
Kito Cheng
1
-285
/
+66
2025-05-13
RISC-V: Introduce riscv_ext_info_t to hold extension metadata
Kito Cheng
1
-14
/
+177
2025-05-13
RISC-V: Adjust riscv_can_inline_p
Kito Cheng
1
-17
/
+0
2025-05-13
RISC-V: Use riscv-ext.def to generate target options and variables
Kito Cheng
1
-51
/
+51
2025-05-12
RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions.
Dongyan Chen
1
-0
/
+36
2025-05-12
RISC-V: Support for zilsd and zclsd extensions.
Dongyan Chen
1
-0
/
+16
2025-05-11
RISC-V: Support RISC-V Profiles 23.
Jiawei
1
-0
/
+16
2025-05-11
RISC-V: Support RISC-V Profiles 20/22.
Jiawei
1
-3
/
+82
2025-05-07
[PATCH] RISC-V: Minimal support for zama16b extension.
Dongyan Chen
1
-0
/
+2
2025-05-06
[PATCH] RISC-V: Minimal support for sdtrig and ssstrict extensions.
Dongyan Chen
1
-0
/
+3
2025-05-06
[PATCH] RISC-V: Recognized svadu and svade extension
Mingzhu Yan
1
-3
/
+7
2025-04-30
RISC-V: Fix missing implied Zicsr from Zve32x
Jerry Zhang Jian
1
-0
/
+1
2025-04-26
Refactor msse4 and mno-sse4.
liuhongt
1
-11
/
+12
2025-04-24
[PATCH] RISC-V: Imply C from Zca whenever possible [PR119122]
Yuriy Kolerov
1
-0
/
+31
2025-04-13
s390: Support z17 processor name
Stefan Schulze Frielinghaus
1
-2
/
+2
2025-04-01
target/119549 - fixup handling of -mno-sse4 in target attribute
Richard Biener
1
-0
/
+2
2025-03-24
i386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -...
Haochen Jiang
4
-16
/
+17
[next]