We now always have expected output.

After a pass calls addRequired<X>() it is strange to call
getAnalysisIfAvailable<X>() because analysis X should always be
available. Use getAnalysis<X>() instead.

Update test/CodeGen/AMDGPU/remat-smrd.mir:

* Convert a negative case of non-dereferenceable invariant load to positive one.
* Add new cases for subreg.

When declaring `auto int` at local or file scope, we emit a warning
intended for C++11 and later, which is incorrect and confusing in C23.
See [Godbolt example](https://godbolt.org/z/j1acGhecd).
Now this diagnostic does not show up in C23.

Looks like larger bitints aren't supported everywhere.

Needed for instrumentation on RISC-V.

This will be needed for some RISC-V instrumentation functions and is
also consistent with other annotation setters.

Reverts the revert commit and fixes the weak ordering requirement of
`llvm::sort`.

Original commit message:

This commit fixes a bug in the Mem2Reg operation erasure order.
Replacing the topological order with a dominance based order ensures
that no operation is removed before all its uses have been replaced.
Additionally, the reliance on the `DenseMap` key order was eliminated by
switching to a `MapVector`, that gives a deterministic iteration order.

Example:

```
%ptr = alloca ...
...
%val0 = %load %ptr ... // LOAD0
store %val0 %ptr ...
%val1 = load %ptr ... // LOAD1
````

When promoting the slot backing %ptr, it can happen that the LOAD0 was
cleaned before LOAD1. This results in all uses of LOAD0 being replaced
by its reaching definition, before LOAD1's result is replaced by LOAD0's
result. The subsequent erasure of LOAD0 can thus not succeed, as it has
remaining usages.

There are cases when cycle that contains both Pred and Succ is not
found: Pred is in a smaller cycle that is contained in a larger cycle
that also contains Succ, or Pred and Succ are in disjointed innermost
cycles but there is a larger cycle that contains both.
Add efficient helper function that finds innermost cycle that contains
both Pred and Succ if it exists.

The current condition causes assert failing if try to add a new vendor
vector file which only contains the same type signature.

Make sure we pass the expected bitwidth around when casting to
IntAP/IntAPS.

This makes it easier to test the `IntegralAP` code for different bit
widths than 128.

Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class as opposed to an enum.
This patch replaces llvm::support::{big,little,native} with
llvm::endianness::{big,little,native}.

The last template parameter of llvm::support::endian::{read,write}
defaults to unaligned, so we can drop that at call sites.

This patch replaces endianness::native with llvm::endianness::native.
Note that endianness::native would rely on:

  using endianness = llvm::endianness;

in llvm/include/llvm/Support/Endian.h.

Added MeshOps and correct dependencies to the BUILD.bazel file.

Now that llvm::support::endianness has been renamed to
llvm::endianness, we can use the shorter form.  This patch replaces
support::endianness with llvm::endianness.

Most ArgList member functions use the modern functionName style while some like
AddAllArgs use the legacy FunctionName style. These uses are mostly linker
options which have been modified recently to fix duplicate -e issues, so just
update these call sites.

If '-r' is specified with target AVR:

1. Do not link to the avr-libc.
2. Do not emit some conflict options.
3. Do not emit any sub-target related address information/warning.

This patch adds stackmap support for RISC-V without targets (i.e. the nop patchable forms).

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D123496

The value extension and truncation were missed during casting __ptr32/__ptr64
pointers to the default address space.

Closes #66873

Now that llvm::support::endianness has been renamed to
llvm::endianness, we can use the shorter form.  This patch replaces
support::endianness::{big,little,native} with
llvm::endianness::{big,little,native}.

* refactor `convertFuncOpToLLVMFuncOp` to accept a `FunctionOpInterface`
instead of func::FuncOp
* move `convertFuncOpToLLVMFuncOp` to corresponding public header,
making it available for downstream project.

This is what AArch64 has done in https://reviews.llvm.org/D20762.

Tests are added in macro fusion tests, which uncover a bug that
DAG mutations don't take effect.

This PR improves memory barriers generated by atomic operations.

Memory barrier semantics of LL/SC:
```
LL: <memory-barrier> + <load-exclusive>
SC: <store-conditional> + <memory-barrier>
```

Changes:
* Remove unnecessary memory barriers before LL and between LL/SC.
* Fix acquire semantics. (If the SC instruction is not executed, then
the guarantee of acquiring semantics cannot be ensured. Therefore, an
acquire barrier needs to be generated when memory ordering includes an
acquire operation.)

DataflowAnalysis.h doesn't use Any.

The last template parameter of llvm::support::endian::{read,write}
defaults to unaligned, so we can drop that at call sites.

Identified with misc-unused-using-decls.

Fix issue https://github.com/llvm/llvm-project/issues/66990

For LLVM_DIAGNOSTIC_DIR we want to create a subdirectory while for
DSYMUTIL_REPRODUCER_PATH we want to use the directory specified. The
latter makes writing a test a whole lot easier. Keep both to support
both scenarios.

This reverts commit b5ff71e2.  As described in
https://github.com/llvm/llvm-project/issues/68730, this appears to have exposed
an existing liveness issue.  Revert to green until we can figure out how to
address the root cause.

Note: This was not a clean revert.  I ended up doing it by hand.

This reverts commit 606f89ab while investigating bot failures.

The `po` alias now matches the behavior of the `expression` command when
the it can apply a Fix-It to an expression.
Modifications

- Add has `m_fixed_expression` to the `CommandObjectDWIMPrint` class a
`protected` member that stores the post Fix-It expression, just like the
`CommandObjectExpression` class.
- Converted messages to present tense.
- Add test cases that confirms a Fix-It for a C++ expression for both
`po` and `expressions`

rdar://115317419



Co-authored-by: Pete Lawrence <plawrence@apple.com>

A recent change to ubsan

(https://github.com/llvm/llvm-project/commit/792674400f6f04a074a3827349ed0e2ac10067f6)
exposed an unaligned load in MachOReader (see
https://lab.llvm.org/buildbot/#/builders/85/builds/19482 for an
example).

This patch fixes it by dropping the alignment.