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2018-10-26Support AT_HWCAP2 on FreeBSD.John Baldwin2-0/+5
2018-10-23S12Z: New 32 bit Reloc.John Darrington1-1/+2
2018-10-09[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRSSudakshina Das2-1/+9
2018-10-09[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registersSudakshina Das2-1/+14
2018-10-09[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das2-1/+21
2018-10-09[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructionsSudakshina Das2-0/+6
2018-10-09[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instructionSudakshina Das2-1/+8
2018-10-09[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructionsSudakshina Das2-1/+13
2018-10-09[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-ASudakshina Das2-1/+9
2018-10-09[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-ASudakshina Das2-1/+14
2018-10-09[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea...Sudakshina Das2-0/+9
2018-10-08Separate header PT_LOAD for -z separate-codeAlan Modra2-0/+7
2018-10-05[Arm, 3/3] Add Execution and Data Prediction instructions for AArch32Sudakshina Das2-1/+8
2018-10-05[Arm, 2/3] Add instruction SB for AArch32Sudakshina Das2-1/+8
2018-10-05[Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32Sudakshina Das2-0/+10
2018-10-05or1k: Add the l.adrp insn and supporting relocationsStafford Horne2-0/+20
2018-10-05or1k: Add relocations for high-signed and low-storesRichard Henderson2-0/+13
2018-10-03AArch64: Add SVE constraints verifier.Tamar Christina2-2/+16
2018-10-03AArch64: Refactor verifiers to make more general.Tamar Christina2-1/+8
2018-10-03AArch64: Refactor err_type.Tamar Christina2-1/+16
2018-10-03AArch64: Wire through instr_sequenceTamar Christina2-2/+27
2018-10-03AArch64: Mark sve instructions that require MOVPRFX constraintsTamar Christina2-2/+22
2018-10-03Make print_insn_s12z public.John Darrington2-0/+5
2018-10-02RISC-V: Add fence.tso instructionPalmer Dabbelt2-0/+7
2018-10-02[ARC] Entries to Changelog for previous commits.Cupertino Miranda1-0/+4
2018-10-01[ARC] Fixed issue with DTSOFF relocs.Cupertino Miranda1-1/+1
2018-10-01[ARC] Fixes TLS failures related to tls-align.Cupertino Miranda1-1/+1
2018-09-21ELF: Don't include zero size sections at start of PT_NOTE segmentH.J. Lu2-4/+12
2018-09-20Andes Technology has good news for you, we plan to update the nds32 port of b...Nick Clifton4-43/+240
2018-09-20Handle missing Solaris auxv entriesRainer Orth2-3/+17
2018-09-05Disable -Wformat-nonliteral in parts of printcmd.cSimon Marchi2-0/+16
2018-08-31PowerPC64 higher REL16 relocationsAlan Modra2-5/+18
2018-08-30RISC-V: Allow instruction require more than one extensionJim Wilson2-2/+14
2018-08-29[MIPS] Add Loongson 2K1000 proccessor support.Chenghua Xu3-0/+6
2018-08-29[MIPS] Add Loongson 3A2000/3A3000 proccessor support.Chenghua Xu3-0/+8
2018-08-29[MIPS] Add Loongson 3A1000 proccessor support.Chenghua Xu3-9/+12
2018-08-29[MIPS/GAS] Add Loongson EXT2 Instructions support.Chenghua Xu3-1/+10
2018-08-29[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.Chenghua Xu3-1/+10
2018-08-29[MIPS/GAS] Split Loongson CAM Instructions from loongson3aChenghua Xu3-1/+10
2018-08-24x86: Update GNU_PROPERTY_X86_XXX macrosH.J. Lu2-24/+147
2018-08-24x86: Add GNU_PROPERTY_X86_UINT32_VALIDH.J. Lu2-0/+7
2018-08-22Fix changelog entriesAlan Modra1-1/+1
2018-08-21S12Z: Rename reloc R_S12Z_UKNWN_3 to R_S12Z_EXT18 and implement according to ...John Darrington2-1/+5
2018-08-21Use operand->extract to provide defaults for optional PowerPC operandsAlan Modra2-18/+29
2018-08-21Fix s12z test regexpsAlan Modra1-1/+1
2018-08-20Tidy bit twiddlingAlan Modra1-3/+3
2018-08-18S12Z: Move opcode header to public include directory.John Darrington2-0/+75
2018-08-09arm - Add some comments about the versions of ARM ELF that define various e_f...Richard Earnshaw2-3/+9
2018-08-06[ARC] Add Tag_ARC_ATR_version.claziss2-1/+6
2018-08-06[ARC] Update handling AUX-registers.claziss2-0/+5