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2022-10-25Remove znver4 instruction reservationsTejas Joshi1-1/+1
2022-10-25riscv: fix cross compilerMartin Liska1-4/+4
2022-10-25i386: fix pedantic warningMartin Liska1-1/+1
2022-10-24x86: fix VENDOR_MAX enum valueMartin Liska1-1/+3
2022-10-24RISC-V: Support --target-help for -mcpu/-mtuneKito Cheng1-0/+46
2022-10-21Enable AMD znver4 support and add instruction reservationsTejas Joshi3-28/+24
2022-10-21Support Intel AVX-VNNI-INT8Kong Lingling4-1/+26
2022-10-21Support Intel AVX-IFMAHongyu Wang4-1/+23
2022-10-17Enable REE for H8Jeff Law1-0/+2
2022-10-17Initial Meteorlake SupportHu, Lin12-0/+6
2022-10-17Initial Raptorlake SupportHaochen Jiang2-0/+4
2022-10-10arc: Remove obsolete mRcq and mRcw options.Claudiu Zissulescu1-2/+0
2022-09-29aarch64: Tweak handling of -mgeneral-regs-onlyRichard Sandiford1-0/+12
2022-09-29aarch64: Tweak contents of flags_on/off fieldsRichard Sandiford1-8/+6
2022-09-29aarch64: Make more use of aarch64_feature_flagsRichard Sandiford1-9/+10
2022-09-29aarch64: Tweak constness of option-related dataRichard Sandiford1-13/+13
2022-09-29aarch64: Avoid std::string in static dataRichard Sandiford1-2/+2
2022-09-29aarch64: Simplify generation of .arch stringsRichard Sandiford1-196/+47
2022-09-29aarch64: Simplify feature definitionsRichard Sandiford1-11/+18
2022-09-29aarch64: Avoid redundancy in aarch64-cores.defRichard Sandiford1-1/+1
2022-09-29aarch64: Add "V" to aarch64-arches.def namesRichard Sandiford1-1/+1
2022-09-29aarch64: Rename AARCH64_FL_FOR_ARCH macrosRichard Sandiford1-1/+1
2022-09-29aarch64: Rename AARCH64_ISA architecture-level macrosRichard Sandiford1-1/+1
2022-09-23RISC-V: Support poly move manipulation and selftests.zhongjuzhe1-1/+1
2022-09-09RISC-V: Suppress build warningsKito Cheng1-18/+18
2022-09-05RISC-V: Support Zmmul extensionLiaoShihua1-0/+4
2022-09-02RISC-V: Implement TARGET_COMPUTE_MULTILIBKito Cheng1-0/+377
2022-09-02Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result.Kito Cheng3-0/+51
2022-08-29s390: Add -munroll-only-small-loops.Robin Dapp1-0/+5
2022-08-26cr16: remove obsoleted portMartin Liska1-27/+0
2022-08-16RISC-V: Support zfh and zfhmin extensionKito Cheng1-0/+8
2022-08-15xtensa: Turn on -fsplit-wide-types-early by defaultTakayuki 'January June' Suwa1-0/+2
2022-07-26LoongArch: Support split symbol.Lulu Cheng1-0/+1
2022-07-03loongarch: use -mno-check-zero-division as the default for optimized codeXi Ruoyao1-3/+0
2022-07-01i386: Add AVX512BW to AVX512F in MASK_ISA2Haochen Jiang1-3/+2
2022-06-25Remove long deprecated tilegx and tilepro portsJeff Law2-112/+0
2022-06-13x86: Require AVX for F16C and VAESH.J. Lu1-4/+4
2022-05-24RISC-V: Add mininal support for Zicbo[mzp]ShiYulong1-0/+8
2022-05-23[x86_64]: Zhaoxin lujiazui enablementMayshao3-1/+64
2022-05-23RISC-V: Fix canonical extension order (K and J)Tsukasa OI1-1/+1
2022-05-16Use more ARRAY_SIZE.Martin Liska1-2/+1
2022-05-11i386: simplify cpu_feature handlingMartin Liska1-22/+28
2022-04-12IBM zSystems: Add support for z16 as CPU name.Andreas Krebbel1-2/+2
2022-03-29LoongArch Port: gcc buildchenglulu1-0/+43
2022-03-21x86: Disable SSE in ISA2 for -mgeneral-regs-onlyH.J. Lu1-1/+1
2022-03-21x86: Properly check FEATURE_AESKLEH.J. Lu1-2/+2
2022-03-21RISC-V: Implement misc macro for vector extensions.Kito Cheng1-8/+8
2022-03-16RISC-V: Add version info for zk, zkn and zksKito Cheng1-0/+4
2022-03-16RISC-V: Handle combine extension in canonical ordering.LiaoShihua1-0/+56
2022-03-04rs6000: Allow -mlong-double-64 after -mabi={ibm,ieee}longdouble [PR104208, PR...Peter Bergner1-0/+10