| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-09-27 | refactor: Merge halt and halt_on_reset variables in processor_t | YenHaoChen | 1 | -2/+2 | |
| 2024-09-27 | refactor: Move halt out of dcsr | YenHaoChen | 1 | -2/+2 | |
| Suggested in https://github.com/riscv-software-src/riscv-isa-sim/pull/1816#pullrequestreview-2331806142. | |||||
| 2024-09-26 | Only enter debug mode once with -H flag (halt_on_reset) | YenHaoChen | 1 | -0/+1 | |
| 2024-09-06 | add support for mcountinhibit CSR | Yangyu Chen | 1 | -2/+4 | |
| We hardwired mcountinihibit to 0 previously. Now, we implemented it. Signed-off-by: Yangyu Chen <cyy@cyyself.name> | |||||
| 2024-08-07 | Add Smdbltrp | Ved Shanbhogue | 1 | -8/+28 | |
| 2024-07-15 | Deprecate dcsr.halt | YenHaoChen | 1 | -1/+1 | |
| The debug spec 1.0.0-rc3 deprecates the dcsr.halt and lets the bit become dcsr.nmip. This commit separates the halt variable from the dcsr.nmip and designates it as an internal variable for halt_on_reset (-H). Additionally, this commit removes the notifying comment about the deprecated dcsr.halt in the main loop. | |||||
| 2024-05-31 | Avoid checking ELP before every instruction fetch | Andrew Waterman | 1 | -2/+2 | |
| Serialize after setting ELP. That way, we can hoist the check outside of the main simulation loop. | |||||
| 2024-03-06 | Zicfilp: Check that the next insn is a lpad if ELP is LP_EXPECTED | Ming-Yi Lai | 1 | -0/+2 | |
| 2023-07-26 | Add prv_changed / v_changed fields to state | Atul Khare | 1 | -0/+2 | |
| This tracks whether the privilege / virtual mode was changed by the execution of the current instruction. | |||||
| 2023-07-20 | Fix compilation warning in riscv/execute.cc | Matthias Brugger | 1 | -1/+1 | |
| ../riscv/execute.cc: In function ‘void commit_log_print_insn(processor_t*, reg_t, insn_t)’: ../riscv/execute.cc:132:16: warning: ‘prefix’ may be used uninitialized [-Wmaybe-uninitialized] 132 | fprintf(log_file, " %c%-2d ", prefix, rd); | ~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../riscv/execute.cc:88:10: note: ‘prefix’ was declared here 88 | char prefix; | ^~~~~~ | |||||
| 2023-05-11 | Plumb in effective virtual bit to take_trigger_action() | rbuchner | 1 | -3/+3 | |
| 2023-04-04 | Don't waste time checking icount when unnecessary | Scott Johnson | 1 | -1/+1 | |
| 2023-02-04 | Remove decode_macros.h from disasm.h | Jerry Zhao | 1 | -0/+1 | |
| 2023-01-30 | triggers: add detect_icount_match() | YenHaoChen | 1 | -0/+8 | |
| 2023-01-30 | triggers: force to slow path with icount triggers | YenHaoChen | 1 | -1/+1 | |
| 2023-01-05 | Remove vestigial UNUSED annotation | Andrew Waterman | 1 | -1/+1 | |
| It dates back to when this code was ifdef'd. | |||||
| 2023-01-05 | Only update histogram when histogramming | Andrew Waterman | 1 | -1/+2 | |
| This is worth a 1.4x speedup on the slow path (when not histogramming). | |||||
| 2023-01-03 | Fix debug-mode regression introduced by 20e7f53 | Jerry Zhao | 1 | -5/+7 | |
| - Debug mode should break the processor out of wfi - wfi in debug mode should execute as a nop | |||||
| 2022-12-27 | Prevent processor_t from retiring instructions after a WFI | Jerry Zhao | 1 | -0/+5 | |
| 2022-12-21 | Only clear logging structures if logging is enabled | Andrew Waterman | 1 | -2/+5 | |
| This speeds up histogramming when logging is disabled, with almost no slowdown for the logging case. | |||||
| 2022-12-21 | Always use slow path for histogramming | Andrew Waterman | 1 | -2/+2 | |
| Speeds up fast path after unconditionally enabling histogram. | |||||
| 2022-12-21 | Support histogram regardless of configure flag | Andrew Waterman | 1 | -2/+0 | |
| 2022-12-20 | Split execute_insn into fast and logged variants | Jerry Zhao | 1 | -14/+9 | |
| Fast variant should only be used when logging is disabled | |||||
| 2022-12-20 | Force slow-path when commit-logging is enabled | Jerry Zhao | 1 | -1/+1 | |
| 2022-12-20 | Always compile commit-log utility functions | Jerry Zhao | 1 | -2/+0 | |
| 2022-12-20 | Always perform symbol lookup in debug | Jerry Zhao | 1 | -5/+0 | |
| 2022-12-20 | Fix compile error in commit-logging code | Jerry Zhao | 1 | -3/+3 | |
| 2022-12-15 | Add config.h includes directly to source files instead of relying on header ↵ | Jerry Zhao | 1 | -0/+1 | |
| chaining This step is to ensure that removing config.h out of headers will not cause regressions. | |||||
| 2022-12-01 | Convert triggers::module_t::detect_trap_match to std::optional | Scott Johnson | 1 | -3/+3 | |
| Goal is to remove match_result_t.fire field to eliminate dont-care fields. | |||||
| 2022-12-01 | triggers: add itrigger_t | YenHaoChen | 1 | -1/+5 | |
| add module_t::trap_taking_match and trigger_t::trap_taking_match for checking itrigger after taking traps | |||||
| 2022-12-01 | triggers: refactor: add take_trigger_action() to processor.h/processor.cc | YenHaoChen | 1 | -12/+1 | |
| 2022-10-21 | fix print message of size-1 accesses | YenHaoChen | 1 | -1/+1 | |
| The number of digits indicates the size of accesses. A size-1 access needs two digits instead of one. | |||||
| 2022-10-06 | Don't use reexecution as the means to implement trigger-after | Andrew Waterman | 1 | -9/+0 | |
| The scheme was based on the notion that memory accesses are idempotent up until the point the trigger would've been hit, which isn't true in the case of side-effecting loads and data-value triggers. Instead, check the trigger on the next instruction fetch. To keep the perf overhead minimal, perform this check on the I$ refill path, and ensure that path is taken by flushing the I$. | |||||
| 2022-10-04 | Suppress most unused variable warnings | Andrew Waterman | 1 | -1/+1 | |
| 2022-10-04 | Delete functions that are actually unused | Andrew Waterman | 1 | -4/+0 | |
| 2022-08-10 | Fix code indentation in processor.cc, interactive.cc, debug_module.h/cc | Weiwei Li | 1 | -12/+12 | |
| execute.cc, entropy_source.h and v_ext_macros.h | |||||
| 2022-08-10 | Add #ifdef RISCV_ENABLE_COMMITLOG for commitlog related code | Weiwei Li | 1 | -0/+2 | |
| 2022-06-01 | Remove the now-unused PC_SERIALIZE_WFI | Kip Walker | 1 | -1/+0 | |
| When WFI was changed to throw a C++ exception, the special-npc signaling became obsolete. | |||||
| 2022-05-19 | Move ebreak* logic from take_trap into instructions. (#1006) | Tim Newsome | 1 | -0/+4 | |
| Now that logic only affects ebreak instructions, and does not affect triggers that also cause a trap to be taken. Fixes #725. Although like Paul, I don't have a test for this case. Introduce trap_debug_mode so so ebreak instructions can force entry into debug mode. | |||||
| 2022-05-04 | Fix the padding of register names in the log (#987) | Shaked Flur | 1 | -1/+1 | |
| This fix print x5 as "x5 ", instead of "x 5". | |||||
| 2022-04-05 | Move trigger match logic into triggers.cc | Tim Newsome | 1 | -1/+1 | |
| 2022-04-05 | trigger_matched_t -> triggers::matched_t | Tim Newsome | 1 | -1/+1 | |
| 2022-03-30 | Replace state.mcontrol with TM.triggers. | Tim Newsome | 1 | -1/+1 | |
| Created a new triggers::module_t to hold the structure. Also make sure mcontrol_t instances are properly initialized. | |||||
| 2022-03-30 | mcontrol_action_t -> triggers::action_t | Tim Newsome | 1 | -2/+2 | |
| These actions are not specific to the mcontrol trigger. | |||||
| 2022-02-19 | Make comment more germane | Andrew Waterman | 1 | -5/+1 | |
| 2022-02-18 | Split out MINSTRET and MCYCLE | Rupert Swarbrick | 1 | -0/+8 | |
| Before this change, the MCYCLE CSR was just a proxy for MINSTRET. Similarly, CYCLE was a proxy for INSTRET. This models a machine where every instruction takes exactly one cycle to execute. That's not quite precise enough if you want to do cosimulation: there, you're going to want to MCYCLE to actually match the behaviour of your processor (because you need reads from the relevant CSRs to give the expected result). This commit splits the two CSRs, leaving the other proxy relationships unchanged. The code in processor_t::step() which bumps MINSTRET now bumps MCYCLE by the same amount, maintaining the previous behaviour. Of course, now a cosimulation environment can update the value of MCYCLE to fix things up for multi-cycle instructions after they run. | |||||
| 2021-11-04 | Report proper GVA bit on breakpoint traps | Scott Johnson | 1 | -1/+1 | |
| 2021-11-04 | Add gva field to trap_breakpoint | Scott Johnson | 1 | -1/+1 | |
| So I can fix breakpoints next to properly report gva. | |||||
| 2021-11-03 | Use appropriate subclass for breakpoint trap | Scott Johnson | 1 | -1/+1 | |
| Improves log because it now shows "trap_breakpoint" instead of "trap #3". | |||||
| 2021-09-29 | Convert vl to csr_t | Scott Johnson | 1 | -1/+1 | |
| Adds commit log events for vl to many vector instructions. | |||||
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