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path: root/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
AgeCommit message (Expand)AuthorFilesLines
13 hours[GISel] Introduce MIFlags::InBounds (#150900)Fabian Ritter1-2/+5
37 hours[GISel] Introduce MachineIRBuilder::(build|materialize)ObjectPtrOffset (#150392)Fabian Ritter1-3/+16
2025-04-30Reland [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instruction...Jonathan Thackray1-0/+16
2025-04-28Revert "[llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructio...Jonathan Thackray1-16/+0
2025-04-28[llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (#136...Jonathan Thackray1-0/+16
2025-04-28[LLVM][GlobalISel] Ensure G_{F}CONSTANT only store references to scalar Const...Paul Walker1-0/+2
2025-03-20[Intrinsics] Add Intrinsic::getFnAttributes() (NFC) (#132029)Nikita Popov1-4/+4
2025-03-02[GlobalISel] Use Register. NFCCraig Topper1-1/+1
2025-01-24AMDGPU/GlobalISel: AMDGPURegBankLegalize (#112864)Petar Avramovic1-0/+9
2024-11-23[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)David Green1-3/+4
2024-11-11[GlobalISel] Import llvm.stepvector (#115721)Thorsten Schütt1-2/+3
2024-11-11[GlobalISel] Add G_STEP_VECTOR instruction (#115598)Thorsten Schütt1-0/+11
2024-11-06[GlobalISel] Remove references to rhs of shufflevector if rhs is undef (#115076)Konstantin Schwarz1-7/+7
2024-10-30[GlobalISel] Import samesign flag (#114267)Thorsten Schütt1-2/+3
2024-10-30Revert "[GlobalISel] Import samesign flag" (#114256)Thorsten Schütt1-3/+2
2024-10-30[GlobalISel] Import samesign flag (#113090)Thorsten Schütt1-2/+3
2024-09-17[GISEL] Fix bugs and clarify spec of G_EXTRACT_SUBVECTOR (#108848)Michael Maitland1-1/+1
2024-08-04[CodeGen] Construct SmallVector with ArrayRef (NFC) (#101841)Kazu Hirata1-7/+7
2024-07-18[GlobalIsel] Add G_SCMP and G_UCMP instructions (#98894)Thorsten Schütt1-0/+12
2024-06-28[PAC][AArch64] Lower ptrauth constants in code (#96879)Daniil Kovalev1-0/+13
2024-06-27Revert "[PAC][AArch64] Lower ptrauth constants in code (#94241)" (#96865)Daniil Kovalev1-13/+0
2024-06-27[PAC][AArch64] Lower ptrauth constants in code (#94241)Daniil Kovalev1-0/+13
2024-06-09GlobalISel: Remove faulty assert in buildAtomicRMW opMatt Arsenault1-1/+0
2024-05-08[GlobalIsel] combine ext of trunc with flags (#87115)Thorsten Schütt1-5/+7
2024-04-24[IR] Memory Model Relaxation Annotations (#78569)Pierre van Houtryve1-1/+3
2024-04-03[RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_I...Michael Maitland1-1/+1
2024-03-27[GlobalISel] Update `MachineIRBuilder::buildAtomicRMW` interface (#86851)Shilei Tian1-26/+28
2024-03-26[GISEL][NFC] Use getElementCount instead of getNumElements in more placesMichael Maitland1-1/+1
2024-03-26[RISCV][GISEL] Legalize, regbankselect, and instruction-select G_VSCALE (#85967)Michael Maitland1-0/+7
2024-03-25Revert "[RISCV][GISEL] Legalize G_VSCALE"Michael Maitland1-7/+0
2024-03-25[RISCV][GISEL] Legalize G_VSCALEMichael Maitland1-0/+7
2024-03-12[GISEL] Add G_VSCALE instruction (#84542)Michael Maitland1-0/+18
2024-03-11[GISEL] Add G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR (#84538)Michael Maitland1-0/+15
2024-03-07[GISEL] Silence unused variable warning. NFCBenjamin Kramer1-2/+1
2024-03-07[GISEL] Add IRTranslation for shufflevector on scalable vector types (#80378)Michael Maitland1-4/+12
2024-03-07Revert "[GISEL] Add IRTranslation for shufflevector on scalable vector types"...Michael Maitland1-12/+4
2024-03-07[GISEL] Add IRTranslation for shufflevector on scalable vector types (#80378)Michael Maitland1-4/+12
2024-02-19[RISCV][GISEL] Add IRTranslation for insertelement with scalable vector type ...Michael Maitland1-2/+2
2024-02-17[AArch64][GlobalISel] Improve and expand fcopysign lowering (#71283)David Green1-5/+10
2024-02-13[LLT] Add and use isPointerVector and isPointerOrPointerVector. NFC. (#81283)Jay Foad1-1/+1
2023-12-14[GlobalIsel][NFC] Harden MachineIRBuilder (#75465)Thorsten Schütt1-2/+8
2023-12-11[GlobalISel] Add G_PREFETCH (#74863)Jay Foad1-0/+12
2023-11-14[RISCV][GISEL] Add support for lowerFormalArguments that contain scalable vec...Michael Maitland1-3/+3
2023-09-22[IRTranslator] Set NUW flag for inbounds gep and load/store offsetsMirko Brkusanin1-4/+4
2023-07-31[GlobalISel] convergent intrinsicsSameer Sahasrabuddhe1-10/+35
2023-06-25[AArch64][GlobalISel] IR translate support for a return instruction of type <...Niwin Anto1-9/+17
2023-04-05[GlobalISel] Improve stack slot tracking in dbg.valuesFelipe de Azevedo Piovezan1-5/+5
2023-02-14[PowerPC][GISel] add support for fpconstantChen Zheng1-0/+9
2023-01-13MachineIRBuilder: Add buildMergeValues. NFCDiana Picus1-0/+10
2023-01-13MachineIRBuilder: Rename buildMerge. NFCDiana Picus1-6/+7
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