rocket-tools/riscv-gnu-toolchain/llvm.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
3 hours	Revert "[BasicBlockUtils] Fix dominator tree update for entry block in splitB...	Mingjie Xu	1	-19/+44
4 hours	[AMDGPU] Add scheduling DAG mutation for hazard latencies (#170075)	Carl Ritson	4	-0/+106
4 hours	[CodeGen] Refactor targets to override the new getTgtMemIntrinsic overload (N...	Nicolai Hähnle	22	-275/+411
5 hours	[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefo...	Mingjie Xu	1	-44/+19
6 hours	[InstCombine] Preserve fdiv metadata on fneg folds (#179157)	Wenju He	1	-4/+11
7 hours	[VPlan] Improve code around ArrayRef construction (NFC) (#179191)	Ramkumar Ramachandra	1	-25/+20
8 hours	Revert "[AutoUpgrade] Prevent deletion of call if uses still exist (#177606)"...	Stefan Weigl-Bosker	1	-40/+25
8 hours	[RISC-V][Mach-O] Add codegen support for Mach-O object format. (#178263)	Francesco Petrogalli	3	-1/+14
8 hours	[CodeGen] Add getTgtMemIntrinsic overload for multiple memory operands (NFC) ...	Nicolai Hähnle	6	-86/+127
8 hours	[AMDGPU][SIInsertWaitcnts][NFC] Replace Wait.combined() with simple assignmen...	vporpo	1	-1/+1
9 hours	[perf] Replace copy-assign by move-assign in llvm/lib/Analysis/* (#178169)	serge-sans-paille	3	-7/+6
9 hours	[AutoUpgrade] Prevent deletion of call if uses still exist (#177606)	Kshitij Paranjape	1	-25/+40
9 hours	[RISCV] Split RISCVLSUMOP tablegen class for type safety. NFC	Craig Topper	1	-10/+14
11 hours	[AArch64] Move the existing fcvt fixed point selection to tblgen. (#178603)	David Green	4	-97/+135
11 hours	[RISCV] Fix register names for CM_MVSA01/QC_CM_MVSA01 check in RISCVAsmParser...	Craig Topper	1	-3/+3
11 hours	ValueTracking: Move powi logic to KnownFPClass (#179301)	Matt Arsenault	2	-16/+27
11 hours	[SLP] Avoid adding duplicate VFs into vectorizeStores()::CandidateVFs (#179296)	Ryan Buchner	1	-8/+6
12 hours	ValueTracking: Move ldexp KnownFPClass handling to support (#179235)	Matt Arsenault	2	-48/+57
12 hours	InstCombine: Fix SimplifyDemandedFPClass bug with known-snan sources (#179244)	Matt Arsenault	1	-5/+21
12 hours	Revert "[VectorCombine] Trim low end of loads used in shufflevector rebroadca...	Hans Wennborg	1	-25/+8
12 hours	InstCombine: Stop using nsz in multi-use min/max fold (#176579)	Matt Arsenault	1	-3/+4
12 hours	ValueTracking: Use computeKnownBits for ldexp integer handling (#179234)	Matt Arsenault	1	-7/+5
13 hours	[NFC][GlobalISel] Expose `CallLowering::buildCopyFromRegs` and `CallLowering:...	Demetrius Kanios	1	-15/+7
13 hours	[LoopUnroll] Remove preceding whitespace in loop peeling optimization remark ...	Justin Fargnoli	1	-1/+1
13 hours	Revert "[CoroCleanup] Noop coroutine elision for load-and-call pattern" (#179...	Weibo He	1	-64/+24
13 hours	[SelectionDAG][NFC] Rename isConstantSequence to isArithmeticSequence (#179108)	Philip Ginsbach-Chen	2	-3/+3
13 hours	AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES (#171653)	Petar Avramovic	4	-4/+79
13 hours	[LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (#178531)	Rahul Joshi	1	-6/+13
14 hours	Revert "[SPIRV] Emit intrinsics for globals only in function that references ...	Juan Manuel Martinez Caamaño	1	-116/+4
14 hours	[ARM] Lower unaligned loads/stores to aeabi functions. (#172672)	Simi Pallipurath	2	-8/+144
15 hours	[NewPM] Port x86-wineh-unwindv2 (#179172)	Anshul Nigham	5	-36/+46
15 hours	[DebugInfo] Convert format() to formatv() in DWARFVerifier (#179194)	Konrad Kleine	1	-114/+109
15 hours	[AMDGPU] Iterative scheduling must behave the same with/without debug (#178460)	LU-JOHN	1	-2/+6
15 hours	[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)	DaKnig	1	-3/+36
16 hours	[PowerPC] using milicode call for strcmp instead of lib call (#177009)	zhijian lin	6	-13/+30
16 hours	[SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (#178799)	Dmitry Sidorov	9	-12/+78
16 hours	[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)	Weibo He	1	-24/+64
16 hours	[SPIRV] Emit intrinsics for globals only in function that references them (#1...	Juan Manuel Martinez Caamaño	1	-4/+116
19 hours	Re-apply "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)...	Lucas Ramirez	2	-345/+732
19 hours	[AsmParser] Track value references and function arguments (#174566)	Bertik23	2	-18/+58
19 hours	[IR] Remove Before argument from splitBlock APIs (NFC) (#179195)	Nikita Popov	6	-33/+17
19 hours	[X86][GISEL] Enable PostLegalize Combiner (#174696)	Mahesh-Attarde	5	-1/+202
20 hours	[AArch64][GlobalISel] Constrain G_CONSTANT_FOLD_BARRIER operand register clas...	Cullen Rhodes	1	-3/+4
20 hours	[X86][APX] Disable PP2/PPX generation on Windows (#178122)	Phoebe Wang	2	-0/+7
21 hours	[AArch64] Support SHUFFLE of ANY_EXTEND in performBuildShuffleExtendCombine (...	Hari Limaye	1	-3/+4
21 hours	[X86] checkSignTestSetCCCombine - handle SIGN_EXTEND_INREG/SHL patterns insid...	Abhiram Jampani	1	-4/+8
21 hours	[DAG] visitVECTOR_SHUFFLE - ensure correct resno when folding shuffle(bop(shu...	Simon Pilgrim	2	-2/+17
21 hours	[AArch64][GlobalISel] Do no skip zext in getTestBitReg. (#177991)	David Green	1	-1/+5
22 hours	AMDGPU: Use SimplifyQuery in AMDGPUCodeGenPrepare (#179133)	Matt Arsenault	1	-22/+27
22 hours	[LoopCacheAnalysis] Remove tryDelinearizeFixedSize (NFCI) (#177552)	Ryotaro Kasuga	1	-33/+4