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2 hours[SPIR-V] Don't consider a function be a builtin just by checking name (#182776)Dmitry Sidorov4-197/+230
2 hours[SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (#179318)Dmitry Sidorov16-9/+2566
2 hours[ARM] Generate test checks (NFC) (#184574)Nikita Popov1-132/+536
2 hours[DSE] Handle provenance when eliminating tautological assignmentsAntonio Frighetto2-12/+74
2 hours[InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (#183692)Kiva8-40/+148
3 hours[WebAssembly] Print type signature and table for call_indirect (#179120)hanbeom9-52/+54
3 hours[Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual`Antonio Frighetto2-3/+14
4 hours[InstCombine] Don't strip leading zero index for overaligned vector GEP (#184...Nikita Popov2-2/+12
4 hours[VPlan] Add const to VPPredicator methods. nfc (#184359)Mel Chen1-8/+9
4 hours[DA] Remove consistent flag from Dependence class (#181608)Ryotaro Kasuga53-293/+267
4 hours[AMDGPU] Add half vector support for table-driven libcall optimization (#178638)Steffen Larsen32-95/+2221
5 hours[X86][APX] Add a few pseudo opcodes support EGPR (#184550)Phoebe Wang2-9/+30
5 hours[MC] Fuse relaxation and layout into a single forward pass (#184544)Fangrui Song4-51/+109
6 hours[MC][test] Add relax-branch-align.s demonstrating unnecessary branch relaxati...Fangrui Song1-0/+49
6 hours[RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (#184155)Luke Lau36-1223/+1427
6 hours[DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (#...Ryotaro Kasuga2-0/+207
6 hours[GVN] Fix crash when svcount is used with globals-aa (#184347)Madhur Amilkanthwar2-1/+17
6 hours[RISCV] Remove OperandType OPERAND_SIMM10_UNSIGNED. Rename OPERAND_SIMM8_UNSI...Craig Topper3-6/+4
8 hours[RISCV][GISel] Replace buildInstr with BuildMI (#183714)Jianjian Guan1-142/+213
10 hours[TargetLowering][PowerPC] Don't unroll vector CLMUL when MUL is not supported...Craig Topper2-2213/+2338
11 hours[NFC] Don't replicate hasKernelCallingConv. (#184464)Alexey Bader2-10/+2
12 hours[LoopUnrollPass] Add `const` to parameters in `computeUnrollCount` (NFC) (#18...Justin Fargnoli1-2/+3
12 hours[NFC] [Doc] Fix text codeblock being declared llvm (#184461)Florian Mayer1-1/+1
12 hours[gn build] Port commits (#184454)Arthur Eubanks8-12/+23
12 hours[NFC] [doc] fix invalid comment syntax in IR (#184457)Florian Mayer1-1/+1
12 hours[WebAssembly] Use MVT::i32 instead of i1 in performAnyAllCombine (#183866)Derek Schuff2-9/+36
13 hours[X86] support reserve r8~r15 on X86_64 (#180242)zhouguangyuan07187-1/+162
14 hours[AMDGPU] Add suffix _d4 to tensor load/store with 4 groups D#, NFC (#184176)Changpeng Fang8-38/+38
15 hours[AMDGPU][SIInsertWaitcnts][NFC] Call applyWaitcnt() in a loop (#184426)vporpo1-10/+2
15 hours[AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr...Yoonseo Choi5-25/+127
15 hours[X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (#184417)Simon Pilgrim2-22/+39
15 hours[X86] known-never-zero.ll - improve demandedelts test coverage for #183227 (#...Simon Pilgrim1-40/+56
16 hours[NFC] [HWASan] more meaningful BB names in use-after-scope test (#183867)Florian Mayer1-167/+167
16 hours[RISCV] Fix type inference ambiguity in SwapSysReg pattern (#184305)lihengda861-source1-1/+1
16 hours[HLSL][SPIRV] Fix `faceforward` pattern matcher logic (#183630)Kaitlin Peng1-5/+5
16 hours[VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (#181571)Florian Hahn2-31/+47
16 hours[Analysis][DXILResource] Correct bound computation (#184198)Finn Plummer3-5/+56
17 hours[NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper funct...zhijian lin1-56/+6
17 hours[RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (#18...Craig Topper3-3194/+6445
17 hours[WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (#184203)hanbeom2-16/+310
17 hours[X86] vector-shuffle-combining-xop.ll - tests showing failure to combine shuf...Simon Pilgrim1-0/+36
17 hours[AArch64] Fix relative vtable PLT/GOTPCREL specifiers to use MCSpecifierExpr ...Fangrui Song4-19/+56
18 hours[VPlan][NFC] Remove unnecessary explicit copy constructors (#183863)calebwat1-9/+0
19 hours[DirectX][ResourceAccess] Resolve resource handles at access (#182106)Finn Plummer4-4/+557
19 hours[AArch64] Add basic NPM support for LoadStoreOptimizer. (#184090)David Green5-23/+87
19 hours[Thumb2] Use BXAUT instruction if available (#183056)walkerkd4-3/+175
20 hoursReapply "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (#...Nick Sarnie7-197/+179
20 hoursFix `assignValueToReg` function's argument (#184354)Shoreshen1-2/+4
20 hours[X86] known-never-zero.ll - add sdiv/udiv vector test coverage for #183047 (#...Simon Pilgrim1-0/+146
20 hours[NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplic...SiliconA-Z1-19/+1
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