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2022-09-18openocd: fix SPDX tag format for files .cAntonio Borneo1-1/+1
With the old checkpatch we cannot use the correct format for the SPDX tags in the file .c, in fact the C99 comments are not allowed and we had to use the block comment. With the new checkpatch, let's switch to the correct SPDX format. Change created automatically through the command: sed -i \ 's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \ $(find src/ contrib/ -name \*.c) Change-Id: I6da16506baa7af718947562505dd49606d124171 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7153 Tested-by: jenkins
2022-07-23openocd: src/target: replace the GPL-2.0-or-later license tagAntonio Borneo1-13/+2
Replace the FSF boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I255ad17235ff1e01bf0aa4deed4d944e1d693ddb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7071 Tested-by: jenkins
2022-06-03cortex_a: get rid of not needed log messagesTarek BOCHKATI1-1/+1
when using semi-hosting with cortex_a this LOG_INFO pollutes openocd console, so just reduce the log level of this message. Change-Id: I91aa70492f4e361b25a0e5517d0cf73f2f8ed599 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://gerrit.st.com/c/stm32ide/official/openocd/+/248225 Tested-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6993 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14target/smp: use a struct list_head to hold the smp targetsAntonio Borneo1-5/+4
Instead of reinventing a simply linked list, reuse the list helper for the list of targets in a smp cluster. Using the existing helper, that implements a double linked list, makes trivial going through the list in reverse order. Change-Id: Ib36ad2955f15cd2a601b0b9e36ca6d948b12d00f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6783 Tested-by: jenkins
2021-09-18openocd: remove last NULL comparisonsAntonio Borneo1-1/+1
The NULL pointers preceded by cast where not detected by the scripting tools looking for NULL pointer comparison. Remove them and, while there, further simplify the code and apply the other coding style rules. Change-Id: Ia7406122e07ef56ef311579ab0ee7ddb22c8e4b5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6539 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-07-24openocd: remove NULL comparisons with checkpatch [1/2]Antonio Borneo1-1/+1
Patch generated automatically through the new checkpatch with flags "--types COMPARISON_TO_NULL --fix-inplace". This only fixes the comparisons if (symbol == NULL) if (symbol != NULL) The case of NULL on the left side of the comparison is not tested. Some automatic fix is incorrect and has been massaged by hands: - if (*psig == NULL) + if (*!psig) changed as + if (!*psig) Change-Id: If4a1e2b4e547e223532e8e3d9da89bf9cb382ce6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6351 Tested-by: jenkins
2021-07-24openocd: fix simple cases of NULL comparisonAntonio Borneo1-1/+1
There are more than 1000 NULL comparisons to be aligned to the coding style. For recurrent NULL comparison it's preferable using trivial scripts in order to minimize the review effort. Patch generated automatically with the command: sed -i PATTERN $(find src/ -type f) where PATTERN is in the list: 's/(\([a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(NULL == \([a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL == \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL == \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL != \([a-z][a-z0-9_]*\))/(\1)/g' 's/(NULL != \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(\1)/g' 's/(NULL != \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(\1)/g' Change-Id: Ida103e325d6d0600fb69c0b7a1557ee969db4417 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6350 Tested-by: jenkins
2021-07-20target/arm: rename CamelCase symbolsAntonio Borneo1-1/+1
No major cross dependencies, mostly changes internal to each file/function. Change-Id: I3f0879f0f33c6badc36a0dc60229323978a7e280 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6338 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Xiang W <wxjstz@126.com>
2021-06-03target/cortex_a: add support for watchpointsChengyu Zheng1-2/+0
The current implementation of OpenOCD does not support watchpoints for cortex_a architecture. So, I replaced the add_watchpoint and remove_watchpoint with the specific implementation for the cortex a and using the breakpoint implementation and the arm documentation [1] as reference. In particular, I have made the following changes: * added the following functions - cortex_a_add_watchpoint This wrapper function check whether there are any watchpoint available on the target device by calling cortex_a_set_watchpoint. - cortex_a_set_watchpoint This function is responsible for settings the watchpoint register pair. In particular, it sets the WVR and the WCR registers with the cortex_a_dap command. - cortex_a_remove_watchpoint This wrapper function the selected watchpoint on the target device by calling cortex_a_unset_watchpoint. - cortex_a_unset_watchpoint This function sets both the WVR and the WCR registers to zero, thus unsetting the watchpoint. [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/BCGDHIEJ.html Change-Id: I86611dab474cb84836662af572b17636dc68e282 Signed-off-by: Chengyu Zheng <chengyu.zheng@polimi.it> Reviewed-on: http://openocd.zylin.com/3913 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Marc Schink <dev@zapb.de> Tested-by: jenkins
2021-05-22target/arm_dpm: rename 'wp_pc' as 'wp_addr'Antonio Borneo1-2/+1
The field 'wp_pc' was originally introduced in commit 55eeea7fceb6 ("ARMv7a/Cortex-A8: report watchpoint trigger insn") in end 2009 to contain the address of the instruction which triggered a watchpoint. Later on with commit 651b861d5d5f ("target/aarch64: Add watchpoint support") it has been reused in to hold directly the memory address that triggered a watchpoint. Rename 'wp_pc' as 'wp_addr' and change its doxygen description. While there, fix the format string to print the field. Change-Id: I2e5ced1497e4a6fb6b38f91e881807512e8d8c47 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6204 Tested-by: jenkins Reviewed-by: Liming Sun <limings@nvidia.com>
2020-11-04target: declare local symbols as staticAntonio Borneo1-1/+1
Functions and variables that are not used outside the file should be declared as static. Change-Id: I9f97571a528f0cb3c3c26f873577ab16fdec3cdc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5895 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-09-05target: use proper format with uint32_tAntonio Borneo1-14/+14
Modify the format strings to properly handle uint32_t data types. While there, fix prototype mismatch between header and C file of the function armv7a_l1_d_cache_inval_virt(). Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5818 Tested-by: jenkins
2020-07-26target: fix minor typos and duplicated wordsAntonio Borneo1-1/+1
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5766 Tested-by: jenkins
2019-05-14helper/command: change prototype of command_print/command_print_samelineAntonio Borneo1-5/+5
To prepare for handling TCL return values consistently, all calls to command_print/command_print_sameline should switch to CMD as first parameter. Change prototype of command_print() and command_print_sameline() to pass CMD instead of CMD_CTX. Since the first parameter is currently not used, the change can be done though scripts without manual coding. This patch is created using the command: sed -i PATTERN $(find src/ doc/ -type f) with all the following patters: 's/\(command_print(cmd\)->ctx,/\1,/' 's/\(command_print(CMD\)_CTX,/\1,/' 's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/' 's/\(command_print_sameline(cmd\)->ctx,/\1,/' 's/\(command_print_sameline(CMD\)_CTX,/\1,/' 's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/' This change is inspired by http://openocd.zylin.com/1815 from Paul Fertser but is now done through scripting. Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/5081 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14target/armv7a: change prototype of armv7a_handle_cache_info_command()Paul Fertser1-5/+5
To prepare for handling TCL return values consistently, all calls to command_print/command_print_sameline should be ready to switch to CMD as first parameter. Change prototype of armv7a_handle_cache_info_command() to pass CMD instead of CMD_CTX. This change was part of http://openocd.zylin.com/1815 from Paul Fertser and has been extracted and rebased to simplify the review. Change-Id: I27f507869cb41c74722a759e69dfd45658fcd4be Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5069 Tested-by: jenkins
2019-04-24armv7a: Improve parsing of MPIDR register to avoid error message for Cortex R5Tommy Vestermark1-13/+11
References: - ARM DDI0406C ARMv7 Architecture Reference Manual, section B4.1.106 - ARM DDI0460D Cortex-R5 Technical Reference Manual section 4.3.6 - ARM 100048_0002_0 Cortex-A73 Technical Reference Manual section 4.5.2 Tested on: TMS570LC4357 Change-Id: Ie0d45fb697697f78cc4ad4e7a0116be9772590ba Signed-off-by: Tommy Vestermark <tov@vestermark.dk> Reviewed-on: http://openocd.zylin.com/5108 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-07target/armv7a: simplify help description of command "l2x"Antonio Borneo1-2/+1
There is no need to split the string in two lines. Change-Id: Ifc574904acd06c31fab589643334e86f4dd0a122 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5016 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-08armv7a: ARMv7-A MMU toolsMatthias Welwarsky1-168/+1
factor out mmu-related code from armv7a.c, add a 'dump' command for page tables. Change-Id: Ic1ac3c645d7fd097e9d625c7c8302e7065875dd4 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4327 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-22armv7a: read ttbcr and ttb0/1 at every entry in debug stateAntonio Borneo1-6/+1
Commit bfc5c764df145f68835543119865eabe462e19c2 avoids reading ttbcr and ttb0/1 at every virt2phys translation by caching them, and it updates the cached values in armv7a_arch_state(). But the purpose of any (*arch_state)() method, thus including armv7a_arch_state(), is to only print out and inform the user about some architecture specific status. Moreover, to reduce the verbosity during a GDB session, the method (*arch_state)() is not executed anymore at debug state entry (check use of target->verbose_halt_msg in src/openocd.c), thus the state of translation table gets out-of-sync triggering Error: Address translation failure or even using a wrong address in the memory R/W operation. In addition, the commit above breaks the case of armv7r by calling armv7a_read_ttbcr() unconditionally. Fixed by moving in cortex_a_post_debug_entry() the call to armv7a_read_ttbcr() on armv7a case only. Remove the call to armv7a_read_ttbcr() in armv7a_identify_cache() since it is (conditionally) called only in the same procedure cortex_a_post_debug_entry(). Fixes: bfc5c764df14 ("armv7a: cache ttbcr and ttb0/1 on debug state entry") Change-Id: Ifc20eca190111832e339a01b7f85d28c1547c8ba Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4601 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30target: restructure dap supportMatthias Welwarsky1-3/+0
- add 'dap create' command to create dap instances - move all dap subcmmand into the dap instance commands - keep 'dap info' for convenience - change all armv7 and armv8 targets to take a dap instance instead of a jtag chain position - restructure tap/dap/target relations, jtag tap no longer references the dap, daps are now independently created and initialized. - clean up swd connect - re-initialize DAP also on JTAG errors (e.g. after reset, power cycle) - update documentation - update target files Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4468 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-11armv7a: cache ttbcr and ttb0/1 on debug state entryMatthias Welwarsky1-28/+19
Instead of re-reading ttbcr and ttb0/1 whenever a virt2phys translation is done, cache the values once when entering debug state. Use the cached values in armv7a_mmu_translate_va(). Change-Id: I1bc5349ad2f19b2dd75bdd48468a2c1f1e028699 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3112 Tested-by: jenkins
2017-10-03Add missing breakFabio Utzig1-1/+1
Change-Id: Ie1de679fe6ab5ace05fc3e156c71f34b296b3d3b Signed-off-by: Fabio Utzig <utzig@apache.org> Reviewed-on: http://openocd.zylin.com/4200 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
2016-11-04semihosting armv7a: Add support for ARMv7-AAndrey Smirnov1-0/+29
Add semihosting support for ARMv7-A based processors. Tested with custom Vybrid VF610 based board and Pandaboard ES (Rev. B1) board (Cortex-A9). Change-Id: I6b896a61c1c6a1c5dcf89de834486f82dd6c80a2 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Tsung-Han Lin <tsunghan.tw@gmail.com> Reviewed-on: http://openocd.zylin.com/2908 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-05-24Remove FSF address from GPL noticesMarc Schink1-3/+1
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-20Fix spelling of ARM CortexAndreas Färber1-1/+1
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-11-30cortex_a: replace cortex_a_check_address functionMatthias Welwarsky1-7/+0
When accessing memory through the ARM core, privilege levels and mmu access permissions observed. Thus it depends on the current mode of the ARM core whether an access is possible or not. the ARM in USR mode can not access memory mapped to a higher privilege level. This means, if the ARM core is halted while executing at PL0, the debugger would be prevented from setting a breakpoint at an address with a higher privilege level, e.g. in the OS kernel. This is not desirable. cortex_a_check_address() tried to work around this by predicting if an access would fail and switched the ARM core to SVC mode. However, the prediction was based on hardcoded address ranges and only worked for Linux and a 3G/1G user/kernel space split. This patch changes the policy to always switch to SVC mode for memory accesses. It introduces two functions cortex_a_prep_memaccess() and cortex_a_post_memaccess() which bracket memory reads and writes. These function encapsulate all actions necessary for preparation and cleanup. Change-Id: I4ccdb5fd17eadeb2b66ae28caaf0ccd2d014eaa9 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3119 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2015-11-30armv7a: remove indirection for cache info handlerMatthias Welwarsky1-48/+32
There's only one function left that handles cache info display, no need any more for a function pointer and runtime initialization. Change-Id: I90b09577f81607917b11f0ab5600a0e2dce223e2 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3025 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2015-11-30armv7a: fix handling of inner cachesMatthias Welwarsky1-117/+138
ARMv7 architecture allows up to 7 cache levels that are architecturally visible, as opposed to "system caches", which are outside of the domain defined by ARMv7 and require separate management. This patch enables detection and identification of caches at all levels. It also implements a new "flush-all" function that cleans & invalidates all cache levels to the "Point of Coherence". Change-Id: Ib77115d6044d39845907941c6f031e208f6e0aa5 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3024 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2015-11-30armv7a: remove special l2x flush-all and cache-info handlersMatthias Welwarsky1-64/+7
This patch is on the path to unified handlers for both inner and outer caches. It removes the special overrides installed when an outer cache is configured. Change-Id: I747f2762c6c8c76c700341cbf6cf500ff2a51476 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3022 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-30armv7a: rename l2_cache to outer_cacheMatthias Welwarsky1-9/+9
The outer cache is not necessarily at L2 in a system. Rename functions to make that clear. Change-Id: Ia636a4844f50634f2bdf5cdce285febc1a47c11f Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3020 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-30armv7a: remove l1 flush all data handlerOleksij Rempel1-71/+4
deprecated by new code. Change-Id: Ie3db627803a6aae38a5287bd3a748a78ab084b7d Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/2801 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-30add armv7a_cache handlersOleksij Rempel1-2/+18
This patch introduces, new command set and handlers for l1 and l2x caches. Patch set 10 folded the following changes into this one: Ib1a2a1fc1b929dc49532ac13a78e8eb796ab4415 If8d87a03281d0f4ad402909998e7834eb4837e79 I0749f129fa74e04f4e9c20d143a744f09ef750d8 Change-Id: I849f4d1f20610087885eeddefa81d976f77cf199 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/2800 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-05armv7a: correct calculation of ttbr0_maskMatthias Welwarsky1-42/+47
This patch brings the calculation of the address ranges handled by ttbr0 and ttbr1 registers in line with ARM DDI 0406C, Table B3-1 Change-Id: Ib807c4b1cb328a6f661e1a0898e744e60d3eccac Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3006 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-05armv7a: re-read ttb information if ttbcr changesMatthias Welwarsky1-6/+17
If ttbcr is changed after the debugger has examined a target for the first time, address translations may fail. This problem does not show up with Linux because it doesn't use ttbr1, but it shows with other OS that use this feature. If the debugger connects to the target while it's in u-boot, all address translations will fail after the OS has booted and the target can not be debugged. This patch reads the ttbcr in armv7a_mmu_translate_va() and compares it a cached value. If a difference is detected, armv7a_read_ttbcr() is called to re-parse the ttb configuration and update the cache. Change-Id: I1c3adf53ea9d748a0e1e3091d9581e5c43ed64e8 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3005 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-02-11armv7a: fix interpretation of MMU tableDaniel Glöckner1-29/+17
On armv7 there no longer are 1kB pages. Instead the bit that in older architectures distinguished 1kB pages from 4kB pages is on armv7 used for as execute-never marker. There may now also be 16MB supersections with 40 bit physical address. Change-Id: I959bdb8012782a9d07d968907a21f50e3d9b356a Signed-off-by: Daniel Glöckner <daniel-gl@gmx.net> Reviewed-on: http://openocd.zylin.com/2386 Tested-by: jenkins Reviewed-by: Vladimir Svoboda <ze.vlad@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-01-28ARMv7-A: remove useless switch constructUwe Kleine-König1-15/+11
The default label does just return the same error code as the case for zero, so this can be handled by a simple if statement. Change-Id: I61a8cb51b5e261f21eca386af7d8cbf17ffa2d44 Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-on: http://openocd.zylin.com/2430 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-01-10cortex_a: Add support for A15 MPCoreKamal Dasu1-11/+78
Added Cortex-A15 support for DAP AHB-AP init code as per ADI V5 spec. Also added changes to make the APB MEM-AP to work with A15. Made the the cortex_a target code generic to work with A8, A9 and A15 single core or multicore implementation. Added armv7a code for os_border calculation to work for known A8, A9 and A15 platforms based on the ARM DDI 0344H, ARM DDI 0407F, ARM DDI 0406C ARMV7A architecture docs. Change-Id: Ib2803ab62588bf40f1ae4b9192b619af31525a1a Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/1601 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-06-01Disable multiprocessor-id read on ARMv7-R coresAlex Ray1-1/+11
ARMv7-R cores are largely uniprocessor-configured, and when they are multiprocessor-configured the format of the MPIDR register isn't compatible with ARMv7-A cores. Change-Id: I024ec514496fbab5075c6fb34b6acd870e68e1fc Signed-off-by: Alex Ray <a@machinaut.com> Reviewed-on: http://openocd.zylin.com/2096 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-05-05armv7a: fix typo in cache_config help textSpencer Oliver1-1/+1
Change-Id: I48cb83bf56b2f6841c3add68ed94b9f92037357d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/2114 Tested-by: jenkins
2013-10-31Remove unnecessary (void *)Andreas Fritiofson1-2/+2
When pointer casts are needed, cast directly to the correct type, instead of going via void*. Don't explicitly cast to void* if it would have been done implicitly. Change-Id: I4093209200051c5eb62847d00a4b9c8567480068 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1669 Tested-by: jenkins Reviewed-by: Mathias Küster <kesmtp@freenet.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31Clean up many C99 integer types format specifiersPaul Fertser1-11/+11
This eliminates most of the warnings reported when building for arm-none-eabi (newlib). Hsiangkai, there're many similar warnings left in your nds32 files, I didn't have the nerve to clean them all, probably you could pick it up. Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1674 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-03-15arch: Added ARMv7R and Cortex-R4 supportEvan Hunter1-5/+12
Rewrite to merge Cortex-A and Cortex-R code Change-Id: I4541557980d43d1bba6e8d1bfeb04f536ed25a00 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/358 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-06target: use common target_name to access target::cmd_name memberSpencer Oliver1-1/+1
Change-Id: I203b89ef25a072c3b00b504483d5f2a83477fad6 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1182 Tested-by: jenkins Reviewed-by: Mathias Küster <kesmtp@freenet.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-08-24build: fix clang warningsMartin Nowak1-1/+1
Change-Id: I3c6a63a18034535f0a8c2c62ba8a708f09d7839b Signed-off-by: Martin Nowak <dawg@dawgfoto.de> Reviewed-on: http://openocd.zylin.com/765 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-02-06build: cleanup src/target directorySpencer Oliver1-239/+232
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver1-15/+15
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18cmd: add missing usage varsSpencer Oliver1-0/+1
we should have caught them all - hopefully. Change-Id: I35435317fccaf5ad0216244d69f76db6857bb582 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/381 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERRORØyvind Harboe1-1/+1
Change-Id: I6dee51e1fab1944085391f274a343cdb9014c7a4 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/300 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-25armv7a: fix scan-build warningsAndreas Fritiofson1-2/+3
"Value stored to 'retval' is never read": Check and propagate error "Dereference of null pointer": Probably bogus, maybe triggered by the null check on armv7a, so remove the check since it can't be null anyway. Change-Id: I3bc44e52af1589ff40e6a42deda0ce7f3a25e397 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/119 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
generated by cgit v1.1 at 2024-08-18 07:01:02 +0000