index
:
riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speed2
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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riscv
Mode
Name
Size
-rw-r--r--
cachesim.cc
4676
log
plain
-rw-r--r--
cachesim.h
2673
log
plain
-rw-r--r--
common.h
180
log
plain
-rw-r--r--
decode.h
5053
log
plain
-rw-r--r--
disasm.cc
13741
log
plain
-rw-r--r--
disasm.h
468
log
plain
-rw-r--r--
dummy-rocc-test.c
948
log
plain
-rw-r--r--
dummy-rocc.h
1066
log
plain
-rw-r--r--
extension.cc
504
log
plain
-rw-r--r--
extension.h
765
log
plain
-rw-r--r--
htif.cc
2781
log
plain
-rw-r--r--
htif.h
667
log
plain
-rw-r--r--
insn_template.cc
568
log
plain
d---------
insns
5734
log
plain
-rw-r--r--
interactive.cc
6111
log
plain
-rw-r--r--
memtracer.h
1051
log
plain
-rw-r--r--
mmu.cc
3016
log
plain
-rw-r--r--
mmu.h
4209
log
plain
-rw-r--r--
opcodes.h
6572
log
plain
-rw-r--r--
pcr.h
3409
log
plain
-rw-r--r--
processor.cc
8303
log
plain
-rw-r--r--
processor.h
2691
log
plain
-rw-r--r--
riscv-dis.cc
870
log
plain
-rw-r--r--
riscv.ac
1039
log
plain
-rw-r--r--
riscv.mk.in
1026
log
plain
-rw-r--r--
rocc.cc
1076
log
plain
-rw-r--r--
rocc.h
620
log
plain
-rw-r--r--
sim.cc
2496
log
plain
-rw-r--r--
sim.h
2577
log
plain
-rw-r--r--
spike.cc
2483
log
plain
-rw-r--r--
termios-xspike.cc
611
log
plain
-rw-r--r--
trap.cc
303
log
plain
-rw-r--r--
trap.h
1444
log
plain
-rw-r--r--
xspike.cc
2064
log
plain