aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Expand)AuthorFilesLines
2013-02-25 * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton3-6/+16
2013-02-19Implement Intel SMAP instructionsH.J. Lu7-2762/+2818
2013-02-15 * metag-dis.c: Initialize outf->bytes_per_chunk to 4Nick Clifton2-0/+7
2013-02-14opcodes/Yufeng Zhang2-15/+24
2013-02-13Correct ChangeLog dates.Maciej W. Rozycki1-1/+1
2013-02-13 opcodes/Maciej W. Rozycki2-0/+8
2013-02-112013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw2-2/+6
2013-02-09gas/Richard Sandiford2-13/+19
2013-02-062013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore8-0/+865
2013-02-04 * po/POTFILES.in: Regenerate.Alan Modra4-1013/+1020
2013-01-30include/opcode/Yufeng Zhang8-659/+732
2013-01-24Add support for V850E3V5 architectureNick Clifton3-197/+955
2013-01-17include/opcode/Yufeng Zhang5-10/+28
2013-01-16Add OPERAND_TYPE_IMM32_64H.J. Lu4-2/+16
2013-01-15 * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton3-2/+10
2013-01-14 * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2-1/+5
2013-01-11include/opcode/Peter Bergner3-1/+76
2013-01-10 * common.h: Fix case of "Meta".Nick Clifton7-0/+3409
2013-01-07oops - typo correction.Nick Clifton1-1/+1
2013-01-07 (make_instruction): Rename to cr16_make_instruction.Nick Clifton2-4/+9
2013-01-04 * archures.c: Add support for MIPS r5900Nick Clifton3-138/+341
2013-01-04opcodes/Yufeng Zhang3-8/+33
2013-01-04 * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,Nick Clifton2-14/+19
2013-01-02Update copyright year to 2013H.J. Lu2-2/+6
2013-01-02opcodes/ChangeLogNick Clifton3-1111/+1140
2012-12-17Add copyright noticesNick Clifton11-2/+187
2012-12-13 PR binutils/14950Alan Modra2-65/+46
2012-12-10Add copyright noticesNick Clifton13-0/+81
2012-11-302012-11-30 Oleg Raikhman <oleg@adapteva.com>Joern Rennecke4-121/+126
2012-11-29opcodes/Roland McGrath2-5/+9
2012-11-29opcodes/Changelog:Michael Eager3-7/+13
2012-11-23include/opcode/Alan Modra2-24/+76
2012-11-21Add swap byte (swapb) and swap halfword (swaph) opcodes.Michael Eager3-2/+9
2012-11-21Add stack high register and stack low register for MicroBlazeMichael Eager3-0/+15
2012-11-20Fix opcode for 64-bit jecxzH.J. Lu3-2/+9
2012-11-202012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-2/+6
2012-11-14opcodes/Michael Eager4-4/+45
2012-11-14Add clz opcode.Michael Eager3-2/+8
2012-11-14Add the endian reversing versions of load/store instructions;Michael Eager3-2/+16
2012-11-092012-11-09 Nick Clifton <nickc@redhat.com>Nick Clifton4-0/+9
2012-11-09Remove trailing redundant `;'H.J. Lu3-2/+7
2012-11-08Regenerate.Alan Modra2-0/+15
2012-11-05 * configure.in: Apply 2012-09-10 change to config.in here.Alan Modra2-2/+7
2012-10-262012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel4-3/+32
2012-10-26gas/testsuite:Christian Groessler3-61/+59
2012-10-26 * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.Alan Modra2-2/+6
2012-10-24gas/testsuite/Roland McGrath2-58/+66
2012-10-22opcodes/Peter Bergner2-1/+5
2012-10-18 * tic54x-dis.c (print_instruction): Don't use K&R style.Tom Tromey2-38/+37
2012-10-18 * aarch64-asm.c (aarch64_ins_ldst_reglist): InitializeKai Tietz3-7/+16