riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2018-11-27	riscv (riscv_block_mvoe_straight): Use RETURN_BEGIN in call to move_by_pieces.	Jeff Law	1	-1/+1
2018-11-17	RISC-V: Fix epilogue unwind info with fp and single sp adjust.	Jim Wilson	1	-1/+22
2018-10-28	Add D front-end, libphobos library, and D2 testsuite.	Iain Buclaw	4	-0/+50
2018-10-05	RISC-V: Fix -fsignaling-nans for glibc testsuite.	Andrew Waterman	1	-6/+28
2018-10-03	RISC-V: Add macro for ilp32e ABI. Cleanup white space.	Jim Wilson	1	-12/+15
2018-09-26	RISC-V: Add missing negate patterns.	Jim Wilson	1	-3/+38
2018-09-26	RISC-V: Delete obsolete MIPS comment.	Jim Wilson	1	-2/+1
2018-09-25	RISC-V: Fix weak symbols with medany and explicit relocs.	Jim Wilson	1	-0/+5
2018-09-24	RISC-V: Fix problems with ilp32e ABI support.	Jim Wilson	1	-3/+4
2018-08-28	Rewrite pic.md to improve medany and pic code size.	Jim Wilson	3	-46/+91
2018-07-14	RISC-V: Fix nested function trampolines.	Jim Wilson	1	-0/+2
2018-07-12	RISC-V: Error if function declared with different interrupt modes.	Kito Cheng	1	-18/+64
2018-07-07	RISC-V: Finish Ada port.	Jim Wilson	1	-0/+4
2018-07-05	Replace NO_IMPLICIT_EXTERN_C with SYSTEM_IMPLICIT_EXTERN_C.	Nathan Sidwell	1	-2/+0
2018-07-02	RISC-V: Fix interrupt support for -g.	Jim Wilson	2	-6/+9
2018-06-30	RISC-V: Add patterns to convert AND mask to two shifts.	Jim Wilson	2	-0/+52
2018-06-15	RISC-V: Add custom RTEMS multilibs	Sebastian Huber	1	-0/+25
2018-06-06	RISC-V: Add interrupt attribute modes.	Jim Wilson	2	-3/+91
2018-06-04	RISC-V: Don't clobber retval when __builtin_eh_return called.	Jim Wilson	3	-17/+56
2018-05-29	RISC-V: Fix a comment typo.	Jim Wilson	1	-1/+1
2018-05-25	RISC-V: Add interrupt attribute support.	Jim Wilson	4	-18/+125
2018-05-18	RISC-V: Add RV32E support.	Kito Cheng	5	-8/+44
2018-05-17	RISC-V: Optimize switch with sign-extended index.	Jim Wilson	1	-2/+12
2018-05-16	RISC-V: Minor pattern name cleanup.	Jim Wilson	1	-4/+4
2018-05-09	RISC-V: Add with-multilib-list support.	Jim Wilson	2	-0/+57
2018-05-08	[PATCH] RISC-V: Use new linker emulations for glibc ABI.	Jim Wilson	1	-2/+10
2018-04-20	RISC-V: Pass --no-relax to linker if -mno-relax is present.	Kito Cheng	2	-0/+2
2018-04-20	RISC-V: Make sure stack is always aligned during adjusting stack.	Kito Cheng	1	-1/+2
2018-04-17	RISC-V: Fix 32-bit stack pointer alignment problem.	Jim Wilson	1	-3/+5
2018-04-06	RISC-V: Support for FreeBSD.	Ruslan Bukin	1	-0/+54
2018-04-02	RISC-V: Fix for combine bug with shift and AND operations.	Jim Wilson	3	-7/+138
2018-03-19	RISC-V: Fix bootstrap failure.	Jim Wilson	2	-8/+8
2018-03-13	RISC-V: Add and document the "-mno-relax" option	Palmer Dabbelt	2	-0/+10
2018-02-14	RISC-V: Change sp subtracts so prologue stores can compress.	Jim Wilson	2	-6/+28
2018-02-13	RISC-V: define _REENTRANT with -pthread	Andreas Schwab	1	-0/+2
2018-01-26	RISC-V: Allow register pairs for 64-bit target.	Jim Wilson	1	-0/+4
2018-01-26	RISC-V: Add --specs=nosys.specs support.	Jim Wilson	1	-1/+1
2018-01-23	RISC-V: Add -mpreferred-stack-boundary option.	Andrew Waterman	3	-5/+33
2018-01-17	RISC-V: Mark fsX as call clobbered when soft-float.	Andrew Waterman	1	-0/+7
2018-01-15	RISC-V: Increase mult/div cost if not implemented in hardware.	Andrew Waterman	1	-1/+7
2018-01-10	RISC-V: Add naked function support.	Kito Cheng	3	-18/+144
2018-01-08	RISC-V: Fix -msave-restore bug with sibcalls.	Jim Wilson	1	-16/+2
2018-01-03	Update copyright years.	Jakub Jelinek	20	-20/+20
2018-01-02	RISC-V: Fix for icache flush issue on multicore processors.	Andrew Waterman	2	-0/+8
2017-12-16	poly_int: IN_TARGET_CODE	Richard Sandiford	3	-0/+6
2017-12-07	Add srodata section support to riscv port.	Andrew Waterman	1	-0/+22
2017-12-04	Fix typos in riscv register save/restore.	Jim Wilson	2	-4/+4
2017-11-29	Riscv patterns to optimize away some redundant zero/sign extends.	Jim Wilson	2	-2/+73
2017-11-12	[riscv] Wrap ASM_OUTPUT_LABELREF in do {} while (0)	Tom de Vries	1	-6/+9
2017-11-08	RISC-V: Fix build error	Kito Cheng	3	-4/+6