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authorJakub Jelinek <jakub@gcc.gnu.org>2018-01-03 11:03:58 +0100
committerJakub Jelinek <jakub@gcc.gnu.org>2018-01-03 11:03:58 +0100
commit85ec4feb11167c9e4489361bf2399a20afbe52c8 (patch)
tree7892dce393111dcf4d6553ddf89de00240ecfce8 /gcc/config/riscv
parentada38d5fa317498d15be166623520b9152c650cb (diff)
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Update copyright years.
From-SVN: r256169
Diffstat (limited to 'gcc/config/riscv')
-rw-r--r--gcc/config/riscv/constraints.md2
-rw-r--r--gcc/config/riscv/elf.h2
-rw-r--r--gcc/config/riscv/generic.md2
-rw-r--r--gcc/config/riscv/linux.h2
-rwxr-xr-xgcc/config/riscv/multilib-generator2
-rw-r--r--gcc/config/riscv/peephole.md2
-rw-r--r--gcc/config/riscv/pic.md2
-rw-r--r--gcc/config/riscv/predicates.md2
-rw-r--r--gcc/config/riscv/riscv-builtins.c2
-rw-r--r--gcc/config/riscv/riscv-c.c2
-rw-r--r--gcc/config/riscv/riscv-ftypes.def2
-rw-r--r--gcc/config/riscv/riscv-modes.def2
-rw-r--r--gcc/config/riscv/riscv-opts.h2
-rw-r--r--gcc/config/riscv/riscv-protos.h2
-rw-r--r--gcc/config/riscv/riscv.c2
-rw-r--r--gcc/config/riscv/riscv.h2
-rw-r--r--gcc/config/riscv/riscv.md2
-rw-r--r--gcc/config/riscv/riscv.opt2
-rw-r--r--gcc/config/riscv/rtems.h2
-rw-r--r--gcc/config/riscv/sync.md2
20 files changed, 20 insertions, 20 deletions
diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index ae93788..aa6e962 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -1,5 +1,5 @@
;; Constraint definitions for RISC-V target.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
;;
diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h
index 391e59f..43ad68b 100644
--- a/gcc/config/riscv/elf.h
+++ b/gcc/config/riscv/elf.h
@@ -1,5 +1,5 @@
/* Target macros for riscv*-elf targets.
- Copyright (C) 1994-2017 Free Software Foundation, Inc.
+ Copyright (C) 1994-2018 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md
index 294c7ef..ba05b6a 100644
--- a/gcc/config/riscv/generic.md
+++ b/gcc/config/riscv/generic.md
@@ -1,5 +1,5 @@
;; Generic DFA-based pipeline description for RISC-V targets.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
index 4b2f7b6..1da1b0a 100644
--- a/gcc/config/riscv/linux.h
+++ b/gcc/config/riscv/linux.h
@@ -1,5 +1,5 @@
/* Definitions for RISC-V GNU/Linux systems with ELF format.
- Copyright (C) 1998-2017 Free Software Foundation, Inc.
+ Copyright (C) 1998-2018 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/riscv/multilib-generator b/gcc/config/riscv/multilib-generator
index 50687b4..ff4c0d7 100755
--- a/gcc/config/riscv/multilib-generator
+++ b/gcc/config/riscv/multilib-generator
@@ -1,7 +1,7 @@
#!/usr/bin/env python
# RISC-V multilib list generator.
-# Copyright (C) 2011-2017 Free Software Foundation, Inc.
+# Copyright (C) 2011-2018 Free Software Foundation, Inc.
# Contributed by Andrew Waterman (andrew@sifive.com).
#
# This file is part of GCC.
diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md
index 7e644e0..55331ef 100644
--- a/gcc/config/riscv/peephole.md
+++ b/gcc/config/riscv/peephole.md
@@ -1,5 +1,5 @@
;; Peephole optimizations for RISC-V for GNU compiler.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; This file is part of GCC.
diff --git a/gcc/config/riscv/pic.md b/gcc/config/riscv/pic.md
index 03b8f9b..a4a9732 100644
--- a/gcc/config/riscv/pic.md
+++ b/gcc/config/riscv/pic.md
@@ -1,5 +1,5 @@
;; PIC codegen for RISC-V for GNU compiler.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; This file is part of GCC.
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 854af14..a2799d4 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -1,5 +1,5 @@
;; Predicate description for RISC-V target.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
;;
diff --git a/gcc/config/riscv/riscv-builtins.c b/gcc/config/riscv/riscv-builtins.c
index 39d2316..b1d89fc 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -1,5 +1,5 @@
/* Subroutines used for expanding RISC-V builtins.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
diff --git a/gcc/config/riscv/riscv-c.c b/gcc/config/riscv/riscv-c.c
index 2a045ec..391b5ee 100644
--- a/gcc/config/riscv/riscv-c.c
+++ b/gcc/config/riscv/riscv-c.c
@@ -1,5 +1,5 @@
/* RISC-V-specific code for C family languages.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
index eb69148..2cf6488 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -1,5 +1,5 @@
/* Definitions of prototypes for RISC-V built-in functions. -*- C -*-
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv-modes.def b/gcc/config/riscv/riscv-modes.def
index 5c65667..6ad7de2 100644
--- a/gcc/config/riscv/riscv-modes.def
+++ b/gcc/config/riscv/riscv-modes.def
@@ -1,5 +1,5 @@
/* Extra machine modes for RISC-V target.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 2b19233..3e10ab3 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -1,5 +1,5 @@
/* Definition of RISC-V target for GNU compiler.
- Copyright (C) 2016-2017 Free Software Foundation, Inc.
+ Copyright (C) 2016-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 5f65b20..1cf016d 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -1,5 +1,5 @@
/* Definition of RISC-V target for GNU compiler.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 0147c31..39e1250 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -1,5 +1,5 @@
/* Subroutines used for code generation for RISC-V.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index feada72..cd37761 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -1,5 +1,5 @@
/* Definition of RISC-V target for GNU compiler.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index dab54ad..99341fa 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1,5 +1,5 @@
;; Machine description for RISC-V for GNU compiler.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index cfd0335..50df851 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -1,6 +1,6 @@
; Options for the RISC-V port of the compiler
;
-; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
diff --git a/gcc/config/riscv/rtems.h b/gcc/config/riscv/rtems.h
index 221e2f6..231b6a0 100644
--- a/gcc/config/riscv/rtems.h
+++ b/gcc/config/riscv/rtems.h
@@ -1,5 +1,5 @@
/* Definitions for RISC-V RTEMS systems with ELF format.
- Copyright (C) 2017 Free Software Foundation, Inc.
+ Copyright (C) 2017-2018 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index cde19e3..b6916bd 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -1,5 +1,5 @@
;; Machine description for RISC-V atomic operations.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
generated by cgit v1.1 at 2024-09-28 23:33:02 +0000