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2009-02-02sde.h (SUBTARGET_ARM_SPEC): Don;t assemble -fpic code as -mabicalls.Catherine Moore1-1/+0
* sde.h (SUBTARGET_ARM_SPEC): Don;t assemble -fpic code as -mabicalls. From-SVN: r143882
2009-02-02mips.h (FILE_HAS_64BIT_SYMBOLS): New macro.Richard Sandiford1-4/+17
gcc/ * config/mips/mips.h (FILE_HAS_64BIT_SYMBOLS): New macro. (ABI_HAS_64BIT_SYMBOLS): Use it. (DWARF2_ADDR_SIZE): Use it instead of ABI_HAS_64BIT_SYMBOLS. From-SVN: r143878
2009-01-28re PR rtl-optimization/38740 (Incorrect delayed branch optimization)Jakub Jelinek1-1/+1
PR rtl-optimization/38740 * reorg.c (gate_handle_delay_slots): Avoid dbr scheduling if !optimize. * config/mips/mips.c (mips_reorg): Likewise. From-SVN: r143733
2009-01-06function.h (rtl_data): Add a dbr_scheduled_p field.Richard Sandiford1-6/+1
gcc/ * function.h (rtl_data): Add a dbr_scheduled_p field. * reorg.c (dbr_schedule): Set it. (gate_handle_delay_slots): Check it. * config/mips/mips.c (mips_base_delayed_branch): Delete. (mips_reorg): Check flag_delayed_branch instead of mips_base_delayed_branch. (mips_override_options): Don't set mips_base_delayed_branch or flag_delayed_branch. From-SVN: r143136
2009-01-04sync.md (*mb_barrier): Rename to...Richard Sandiford1-1/+1
gcc/ * config/mips/sync.md (*mb_barrier): Rename to... (*memory_barrier): ...this. From-SVN: r143060
2009-01-04s390.md (UNSPEC_MB): Rename from UNSPECV_MB.Uros Bizjak1-3/+12
* config/s390/s390.md (UNSPEC_MB): Rename from UNSPECV_MB. (memory_barrier): Expand as unspec instead of unspec_volatile. Remove mem:BLK from insn operands. Use Pmode scratch register. (*memory_barrier): Define as unspec instead of unspec_volatile. Use (match_dup 0) as input operand. * config/sparc/sparc.md (UNSPEC_MEMBAR): Rename from UNSPECV_MEMBAR. * config/sparc/sync.md (memory_barrier): Expand as unspec instead of unspec_volatile. Remove mem:BLK from insn operands. Use Pmode scratch register. Remove operand 1. (*stbar): Define as unspec instead of unspec_volatile. Use (match_dup 0) as input operand, remove (const_int 8). (*membar): Define as unspec instead of unspec_volatile. Use (match_dup 0) as input operand, remove input operand 2. * config/xtensa/xtensa.md (UNSPEC_MEMW): Rename from UNSPECV_MEMW. (memory_barrier): Expand as unspec instead of unspec_volatile. Remove mem:BLK from insn operands. Use Pmode scratch register. (*memory_barrier): Define as unspec instead of unspec_volatile. Use (match_dup 0) as input operand. * config/ia64/sync.md (memory_barrier): Redefine as expander pattern. Remove mem:BLK from insn operands. Use Pmode scratch register. Set volatile flag on operand 0. (*memory_barrier): New insn pattern. * config/rs6000/sync.md (memory_barrier): Remove mem:BLK from insn operands. (*memory_barrier): Use (match_dup 0) as input operand. * config/mips/sync.md (memory_barrier): Redefine as expander pattern. Remove mem:BLK from insn operands. Use Pmode scratch register. Set volatile flag on operand 0. (*memory_barrier): New insn pattern. * config/alpha/sync.md (*memory_barrier): Rename from *mb_internal. From-SVN: r143047
2008-12-21mips-dsp.md (mips_lbux): Turn into a define_expand, changing operand 1 to a ↵Richard Sandiford2-20/+64
pmode_register_operand. gcc/ * config/mips/mips-dsp.md (mips_lbux): Turn into a define_expand, changing operand 1 to a pmode_register_operand. (mips_lhx, mips_lwx): Likewise. (mips_lbux_<mode>, mips_lhx_<mode>, mips_lwx_<mode>): New patterns. * config/mips/mips.c (mips_prepare_builtin_arg): Get the mode of the value from the argument expression. From-SVN: r142872
2008-12-15mips.c (mips_output_conditional_branch): Assert that openrands[1] is a ↵Adam Nemet1-0/+2
CODE_LABEL. * config/mips/mips.c (mips_output_conditional_branch): Assert that openrands[1] is a CODE_LABEL. From-SVN: r142772
2008-12-15mips.c (mips_expand_builtin_direct): Set TARGET to the result of ↵Richard Sandiford1-1/+2
mips_prepare_builtin_target. gcc/ * config/mips/mips.c (mips_expand_builtin_direct): Set TARGET to the result of mips_prepare_builtin_target. From-SVN: r142771
2008-12-15mips.h (TARGET_CPU_CPP_BUILTINS): Define __mips_abicalls if TARGET_ABICALLS ↵Richard Sandiford1-0/+5
is true. gcc/ * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define __mips_abicalls if TARGET_ABICALLS is true. From-SVN: r142770
2008-12-15mips.md (move_doubleword_fpr<mode>): Use TARGET_FLOAT64 && !TARGET_64BIT to ↵Richard Sandiford1-3/+3
detect the mxhc1 case. gcc/ * config/mips/mips.md (move_doubleword_fpr<mode>): Use TARGET_FLOAT64 && !TARGET_64BIT to detect the mxhc1 case. From-SVN: r142769
2008-12-11* config/mips/mips.md (*branch_bit<bbv><mode>,Adam Nemet1-8/+8
*branch_bit<bbv><mode>_inverted): Renumber operands so that the label becomes operands[1]. From-SVN: r142694
2008-12-10sync.md (sync_<optab>_12): Replace MIPS_SYNC_OP_12_NOT_NOP with ↵David Daney2-49/+45
MIPS_SYNC_OP_12_AND. * config/mips/sync.md (sync_<optab>_12): Replace MIPS_SYNC_OP_12_NOT_NOP with MIPS_SYNC_OP_12_AND. (sync_old_<optab>_12): Remove third paramater to MIPS_SYNC_OLD_OP_12 macro, replace MIPS_SYNC_OLD_OP_12_NOT_NOP with MIPS_SYNC_OLD_OP_12_AND. (sync_new_<optab>_12): Replace MIPS_SYNC_NEW_OP_12_NOT_NOP with MIPS_SYNC_NEW_OP_12_AND. (sync_nand_12): Replace MIPS_SYNC_OP_12_NOT_NOT with MIPS_SYNC_OP_12_XOR, reduce length attribute to 40. (sync_old_nand_12): Remove third paramater to MIPS_SYNC_OLD_OP_12 macro, replace MIPS_SYNC_OLD_OP_12_NOT_NOT with MIPS_SYNC_OLD_OP_12_XOR and reduce length attribute to 40. (sync_new_nand_12): Replace MIPS_SYNC_NEW_OP_12_NOT_NOT with MIPS_SYNC_NEW_OP_12_XOR. * config/mips/mips.h (MIPS_SYNC_OP_12, MIPS_SYNC_OP_12_NOT_NOP, MIPS_SYNC_OP_12_NOT_NOT,MIPS_SYNC_OLD_OP_12_NOT_NOP, MIPS_SYNC_OLD_OP_12_NOT_NOT, MIPS_SYNC_NEW_OP_12, MIPS_SYNC_NEW_OP_12_NOT_NOP, MIPS_SYNC_NEW_OP_12_NOT_NOT, MIPS_SYNC_NAND, MIPS_SYNC_OLD_NAND, MIPS_SYNC_NEW_NAND): Rewritten to implement new __sync_nand semantics. (MIPS_SYNC_OLD_OP_12): Implement new __sync_nand semantics, and remove third parameter. (MIPS_SYNC_OLD_OP_12_NOT_NOP_REG, MIPS_SYNC_OLD_OP_12_NOT_NOT_REG): Removed. (MIPS_SYNC_OP_12_NOT_NOP): Renamed to MIPS_SYNC_OP_12_AND. (MIPS_SYNC_OP_12_NOT_NOT): Renamed to MIPS_SYNC_OP_12_XOR. (MIPS_SYNC_OLD_OP_12_NOT_NOP): Renamed to MIPS_SYNC_OLD_OP_12_AND. (MIPS_SYNC_OLD_OP_12_NOT_NOT): Renamed to MIPS_SYNC_OLD_OP_12_XOR. (MIPS_SYNC_NEW_OP_12_NOT_NOP): Renamed to MIPS_SYNC_NEW_OP_12_AND. (MIPS_SYNC_NEW_OP_12_NOT_NOT): Renamed to MIPS_SYNC_NEW_OP_12_XOR From-SVN: r142638
2008-12-02Sorry, committed the wrong version of the last patch.Richard Sandiford1-6/+5
From-SVN: r142376
2008-12-02mips.c (mips_expand_builtin): Fix the mode of the error return value.Richard Sandiford2-26/+39
gcc/ * config/mips/mips.c (mips_expand_builtin): Fix the mode of the error return value. * config/mips/mips.md (IMOVE32): New mode iterator. (movsi): Generalize with IMOVE32. (*movsi_internal): Likewise. (*mov<mode>_mips16): Likewise, and its define_splits. (*lwxs): Likewise. From-SVN: r142375
2008-12-01linux64.h (DRIVER_SELF_SPECS): Add LINUX_DRIVER_SELF_SPECS.David Daney1-3/+4
* config/mips/linux64.h (DRIVER_SELF_SPECS): Add LINUX_DRIVER_SELF_SPECS. Co-Authored-By: Adam Nemet <anemet@caviumnetworks.com> From-SVN: r142334
2008-11-26mips.md (clear_hazard): Rename to clear_hazard_<mode>.Adam Nemet1-4/+6
* config/mips/mips.md (clear_hazard): Rename to clear_hazard_<mode>. Use mode-specific addition. (clear_cache): Rename gen_clear_hazard to gen_clear_hazard_si or gen_clear_hazard_di depending on the size of Pmode. From-SVN: r142229
2008-11-24mips.h (ASM_OUTPUT_DEBUG_LABEL): Define.Richard Sandiford1-0/+26
gcc/ * config/mips/mips.h (ASM_OUTPUT_DEBUG_LABEL): Define. From-SVN: r142173
2008-11-22mips.md (rdhwr): Rename to rdhwr_synci_step_<mode>.Adam Nemet2-6/+8
* config/mips/mips.md (rdhwr): Rename to rdhwr_synci_step_<mode>. Use constant 1 as the operand. * config/mips/mips.c (mips_expand_synci_loop): Make INC Pmode. Rename gen_rdhwr to gen_rdhwr_synci_step_si or gen_rdhwr_synci_step_di depending on the size of Pmode. From-SVN: r142123
2008-11-19mips.c (mips_gimplify_va_arg_expr): Use -rsize with the same type as the ↵Adam Nemet1-1/+1
first operand of the AND expression. * config/mips/mips.c (mips_gimplify_va_arg_expr): Use -rsize with the same type as the first operand of the AND expression. testsuite/ * gcc.c-torture/compile/20081119-1.c: New test. From-SVN: r142024
2008-11-18re PR target/37362 (Bootstrap broken on mipsisa64r2-linux-gcc)Uros Bizjak1-3/+3
PR target/37362 * config/mips/mips.md (move_doubleword_fpr<mode>): Check that "high" is a register or zero operand in the correct mode before generating mtch1 insn or a register operand in the correct mode before generating mfch1 insn. (mtch1<mode>): Correct operand 1 predicate to reg_or_0_operand. testsuite/ChangeLog: PR target/37362 * gcc.target/mips/pr37362.c: New test. From-SVN: r141978
2008-11-18config.gcc (mips*-sde-elf*): Handle mipsisa64r2*.Adam Nemet4-12/+16
gcc/ * config.gcc (mips*-sde-elf*): Handle mipsisa64r2*. (mipsisa64r2-*-elf*, mipsisa64r2el-*-elf*): Add new cases to mipsisa*-*-elf*. Handle mipsisa64r2*. * config/mips/sde.h (LINK_SPEC): Handle -mips64r2. * config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add mips64r2. (MULTILIB_EXCLUSIONS): Add mips64r2/mfp64. * config/mips/t-sde (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add mips64r2. (MULTILIB_EXCLUSIONS): Add mips64r2/mfp64. Add mips64r2/mips16. Fix mips16 if mips64 or mips64r2 are multilib defaults. * config/mips/t-sdemtk (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add mips64r2. libgcc/ * config.host (mipsisa64r2-*-elf* | mipsisa64r2el-*-elf*): New case. From-SVN: r141976
2008-11-17mips.h (REG_ALLOC_ORDER): Put accumulators first.Richard Sandiford2-7/+19
gcc/ * config/mips/mips.h (REG_ALLOC_ORDER): Put accumulators first. Tweak formatting. * config/mips/mips.c (mips_ira_cover_classes): Don't use accumulator registers when not optimizing. gcc/testsuite/ * gcc.target/mips/dspr2-MULT.c: Just check for $ac1 and $ac2. * gcc.target/mips/dspr2-MULTU.c: Likewise. From-SVN: r141955
2008-11-17mips.md (*mul_acc_si): Remove middle alternative and its associated ↵Richard Sandiford1-66/+47
define_split. gcc/ * config/mips/mips.md (*mul_acc_si): Remove middle alternative and its associated define_split. Expose the all-d alternative to the register allocator, but mark it with "?". Mark the first alternative with "*?*?". (*mul_sub_si): Likewise. (*mul_acc_si_r3900): New pattern. gcc/testsuite/ * gcc.target/mips/madd-5.c: New test. * gcc.target/mips/madd-6.c: Likewise. * gcc.target/mips/madd-7.c: Likewise. * gcc.target/mips/madd-8.c: Likewise. * gcc.target/mips/msub-5.c: Likewise. * gcc.target/mips/msub-6.c: Likewise. * gcc.target/mips/msub-7.c: Likewise. * gcc.target/mips/msub-8.c: Likewise. From-SVN: r141954
2008-11-16mips.h (MIPS_ISA_LEVEL_SPEC): Map -march=r1[0246]000 to -mips4.Joshua Kinard1-1/+2
gcc/ 2008-11-16 Joshua Kinard <kumba@gentoo.org> * config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Map -march=r1[0246]000 to -mips4. From-SVN: r141928
2008-11-16re PR target/38052 (genautomata segfaults when -O2 is enabled)Richard Sandiford1-28/+65
gcc/ PR target/38052 * config/mips/mips.c (mips_cfun_call_saved_reg_p) (mips_cfun_might_clobber_call_saved_reg_p): New functions, split out from... (mips_save_reg_p): ...here. Always consult TARGET_CALL_SAVED_GP rather than call_really_used_regs when handling $gp. From-SVN: r141926
2008-11-16re PR target/38052 (genautomata segfaults when -O2 is enabled)Richard Sandiford1-10/+11
gcc/ PR target/38052 * config/mips/mips.c (machine_function): Update the comment above global_pointer. (mips_global_pointer): Use INVALID_REGNUM rather than 0 to indicate that a function doesn't need a global pointer. (mips_current_loadgp_style): Update accordingly. (mips_restore_gp): Likewise. (mips_output_cplocal): Likewise. (mips_expand_prologue): Likewise. From-SVN: r141925
2008-11-15invoke.texi (-mfix-r10000): Document.Joshua Kinard5-51/+103
gcc/ 2008-11-15 Joshua Kinard <kumba@gentoo.org> * doc/invoke.texi (-mfix-r10000): Document. * config/mips/mips.opt (mfix-r10000): New option. * config/mips/mips-protos.h (mips_output_sync_loop): Declare. * config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Use %?. (MIPS_COMPARE_AND_SWAP_12): Likewise. (MIPS_SYNC_OP): Likewise. (MIPS_SYNC_OP_12): Likewise. (MIPS_SYNC_OLD_OP_12): Likewise. (MIPS_SYNC_NEW_OP_12): Likewise. (MIPS_SYNC_OLD_OP): Likewise. (MIPS_SYNC_NAND): Likewise. (MIPS_SYNC_OLD_NAND): Likewise. (MIPS_SYNC_EXCHANGE): Likewise. (MIPS_SYNC_EXCHANGE_12): Likewise. (MIPS_SYNC_NEW_OP): Likewise, using %~ to fill branch-likely delay slots. (MIPS_SYNC_NEW_NAND): Likewise. * config/mips/mips.c (mips_print_operand_punctuation): Handle '~'. (mips_init_print_operand_punct): Treat '~' as a punctuation character. (mips_output_sync_loop): New function. (mips_override_options): Make -march=r10000 imply -mfix-r10000. Make -mfix-r10000 require branch-likely instructions. * config/mips/sync.md (sync_compare_and_swap<mode>): Use mips_output_sync_loop. (compare_and_swap_12): Likewise. (sync_add<mode>): Likewise. (sync_<optab>_12): Likewise. (sync_old_<optab>_12): Likewise. (sync_new_<optab>_12): Likewise. (sync_nand_12): Likewise. (sync_old_nand_12): Likewise. (sync_new_nand_12): Likewise. (sync_sub<mode>): Likewise. (sync_old_add<mode>): Likewise. (sync_old_sub<mode>): Likewise. (sync_new_add<mode>): Likewise. (sync_new_sub<mode>): Likewise. (sync_<optab><mode>): Likewise. (sync_old_<optab><mode>): Likewise. (sync_new_<optab><mode>): Likewise. (sync_nand<mode>): Likewise. (sync_old_nand<mode>): Likewise. (sync_new_nand<mode>): Likewise. (sync_lock_test_and_set<mode>): Likewise. (test_and_set_12): Likewise. gcc/testsuite/ 2008-11-15 Joshua Kinard <kumba@gentoo.org> Richard Sandiford <rdsandiford@goolemail.com> * gcc.target/mips/fix-r10000-1.c: New test. * gcc.target/mips/fix-r10000-2.c: Likewise. * gcc.target/mips/fix-r10000-3.c: Likewise. * gcc.target/mips/fix-r10000-4.c: Likewise. * gcc.target/mips/fix-r10000-5.c: Likewise. * gcc.target/mips/fix-r10000-6.c: Likewise. * gcc.target/mips/fix-r10000-7.c: Likewise. * gcc.target/mips/fix-r10000-8.c: Likewise. * gcc.target/mips/fix-r10000-9.c: Likewise. * gcc.target/mips/fix-r10000-10.c: Likewise. * gcc.target/mips/fix-r10000-11.c: Likewise. * gcc.target/mips/fix-r10000-12.c: Likewise. * gcc.target/mips/fix-r10000-13.c: Likewise. * gcc.target/mips/fix-r10000-14.c: Likewise. * gcc.target/mips/fix-r10000-15.c: Likewise. Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com> From-SVN: r141886
2008-11-13loongson.md (<u>div<mode>3, [...]): New patterns.Ruan Beihong4-8/+56
gcc/ 2008-11-13 Ruan Beihong <ruanbeihong@gmail.com> * config/mips/loongson.md (<u>div<mode>3, <u>mod<mode>3): New patterns. * config/mips/loongson2ef.md (ls2_imult): Handle imul3nc. (ls2_idiv): Likewise idiv3. (ls2_prefetch): New reservation. * config/mips/mips.h (ISA_HAS_PREFETCH): Add TARGET_LOONGSON_2EF. * config/mips/mips.md (type): Add imul3nc and idiv3. (length): Handle idiv3. (any_mod): New code_iterator. (u): Handle MOD and UMOD. (mul<mode>3): Generate mul<mode>3_mul3_ls2ef on Loongson targets. (prefetch): Handle TARGET_LOONGSON_2EF. From-SVN: r141835
2008-11-10config.gcc (mips64vrel-*-elf*): Include the tm_file prior to vr.h.Catherine Moore6-8/+36
* config.gcc (mips64vrel-*-elf*): Include the tm_file prior to vr.h. * config/mips/linux.h (LINUX_DRIVER_SELF_SPECS): New. (BASE_DRIVER_SELF_SPECS): Remove. (DRIVER_SELF_SPECS): New definition. * config/mips/elfoabi.h: (DRIVER_SELF_SPECS): Include BASE_DRIVER_SELF_SPECS. * config/mips/sde.h: Likewise. * config/mips/iris6.h: Likewise. * config/mips/vr.h: Likewise. * config/mips/mips.h (BASE_DRIVER_SELF_SPECS): New. From-SVN: r141754
2008-11-03mips.c (mips_conditional_register_usage): Handle the DSP control register.Catherine Moore1-1/+8
* config/mips.c (mips_conditional_register_usage): Handle the DSP control register. * doc/extend.texi: Document the DSP control register. From-SVN: r141568
2008-10-25mips.h (REG_ALLOC_ORDER): Put call-clobbered registers first.Richard Sandiford1-7/+25
gcc/ * config/mips/mips.h (REG_ALLOC_ORDER): Put call-clobbered registers first. From-SVN: r141362
2008-10-24mips.c (mips_canonicalize_move_class): New function.Richard Sandiford1-44/+124
gcc/ * config/mips/mips.c (mips_canonicalize_move_class): New function. (mips_move_to_gpr_cost): Likewise. (mips_move_from_gpr_cost): Likewise. (mips_register_move_cost): Make more fine-grained. From-SVN: r141336
2008-10-22* config/mips/mips.opt (msmartmips): Accept -mno-smartmips.Chao-ying Fu1-1/+1
From-SVN: r141309
2008-10-14mips.h (reg_class): Remove HI_AND_GR_REGS...Richard Sandiford2-54/+60
gcc/ * config/mips/mips.h (reg_class): Remove HI_AND_GR_REGS, LO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS and ALL_COP_AND_GR_REGS. Add GR_AND_MD0_REGS, GR_AND_MD1_REGS, GR_AND_MD_REGS and GR_AND_ACC_REGS. (REG_CLASS_NAMES): Update accordingly. (REG_CLASS_CONTENTS): Likewise. Use the class name in the comments, rather than an unpredictable descriptive string. * config/mips/mips.c (mips_register_move_cost): Remove comment. (mips_register_move_cost): Check for specific COP*_REGS classes, instead of ALL_COP_AND_GR_REGS. (mips_ira_cover_classes): New function. (mips_secondary_reload_class): Remove MTLO and MTHI workarounds. (TARGET_IRA_COVER_CLASSES): Define. From-SVN: r141117
2008-10-11re PR middle-end/37448 (cannot compile big function)Kenneth Zadeck1-1/+1
2008-10-11 Kenneth Zadeck <zadeck@naturalbridge.com> PR rtl-optimization/37448 * df.h: (df_ref_class): New enum. (DF_REF_TYPE_NAMES, df_ref_extract): Removed. (struct df_ref): Replaced with union df_ref_d. (df_base_ref, df_artificial_ref, df_regular_ref, df_extract_ref): New members of df_ref_d union. (DF_REF_REAL_REG, DF_REF_REGNO, DF_REF_REAL_LOC, DF_REF_REG, DF_REF_LOC, DF_REF_BB, DF_REF_INSN_INFO, DF_REF_INSN, DF_REF_CLASS, DF_REF_TYPE, DF_REF_CHAIN, DF_REF_ID, DF_REF_FLAGS, DF_REF_ORDER, DF_REF_IS_ARTIFICIAL, DF_REF_NEXT_REG, DF_REF_PREV_REG, DF_REF_EXTRACT_WIDTH, DF_REF_EXTRACT_OFFSET, DF_REF_EXTRACT_MODE): Replaced definition to access union df_ref_d. (DF_MWS_REG_DEF_P, DF_MWS_REG_USE_P, DF_MWS_TYPE): New macros. (df_scan_bb_info, df_bb_regno_first_def_find, df_bb_regno_last_def_find, df_find_def, df_find_use, df_refs_chain_dump, df_regs_chain_dump, df_ref_debug, debug_df_ref, df_chain_create, df_chain_unlink, df_chain_copy, df_ref_create, df_ref_remove, df_compute_accessed_bytes, df_get_artificial_defs, df_get_artificial_uses, union_defs) Replaced struct df_ref * with df_ref. * df-scan.c (df_collection_rec, df_null_ref_rec, df_ref_chain_delete_du_chain, df_ref_chain_delete, df_install_ref, df_grow_ref_info, df_ref_create, df_reg_chain_unlink, df_ref_compress_rec, df_ref_remove, df_ref_chain_delete_du_chain, df_ref_chain_delete, df_free_collection_rec, df_insn_rescan, df_reorganize_refs_by_reg_by_reg, df_reorganize_refs_by_reg_by_insn, df_reorganize_refs_by_reg, df_ref_change_reg_with_loc_1, df_notes_rescan, df_swap_refs, df_sort_and_compress_refs, df_install_ref, df_install_refs, df_ref_record, df_get_conditional_uses, df_get_call_refs, df_bb_refs_record, df_exit_block_uses_collect, df_record_exit_block_uses, df_reg_chain_mark, df_reg_chain_verify_unmarked, df_refs_verify): Replaced struct df_ref * with df_ref. (df_ref_record, df_uses_record, df_ref_create_structure): Added df_ref_class parameter. (df_scan_problem_data): Added new pools for different types of refs. (df_scan_free_internal, df_scan_alloc, df_free_ref, df_ref_create_structure): Processed new ref pools. (df_scan_start_dump): Added counts of refs and insns. (df_ref_create, df_notes_rescan, df_def_record_1, df_uses_record, df_get_call_refs, df_insn_refs_collect, df_bb_refs_collect, df_entry_block_defs_collect, df_exit_block_uses_collect): Added code to pass df_ref_class down to ref creation functions. (df_reg_chain_unlink, df_ref_remove, df_ref_change_reg_with_loc_1, df_reg_chain_mark): Use macros to hide references to df_refs. (df_ref_chain_change_bb): Removed. (df_insn_change_bb): Remove calls to df_ref_insn_change_bb. (df_ref_equal_p, df_ref_compare, df_ref_create_structure): Enhanced to understand df_ref union structure. * fwprop.c (local_ref_killed_between_p, use_killed_between, all_uses_available_at, update_df, try_fwprop_subst, forward_propagate_subreg, forward_propagate_and_simplify, forward_propagate_into, fwprop, fwprop_addr): Replaced struct df_ref * with df_ref. (use_killed_between, all_uses_available_at): Use macros to hide references to df_refs. * regstat.c (regstat_bb_compute_ri, regstat_bb_compute_calls_crossed): Replaced struct df_ref * with df_ref. * see.c (see_handle_relevant_defs, see_handle_relevant_uses, see_handle_relevant_refs, see_analyze_one_def, see_update_relevancy, see_propagate_extensions_to_uses): Replaced struct df_ref * with df_ref. * ra-conflict.c (record_one_conflict, clear_reg_in_live, global_conflicts): Replaced struct df_ref * with df_ref. * ddg.c (create_ddg_dep_from_intra_loop_link, add_cross_iteration_register_deps, build_inter_loop_deps): Replaced struct df_ref * with df_ref. (create_ddg_dep_from_intra_loop_link, add_cross_iteration_register_deps): Use macros to hide references to df_refs. * auto-inc-dec.c (find_inc, merge_in_block): Replaced struct df_ref * with df_ref. * df-core.c (df_bb_regno_first_def_find, df_bb_regno_last_def_find, df_find_def, df_find_use, df_refs_chain_dump, df_regs_chain_dump, df_ref_debug, debug_df_ref): Replaced struct df_ref * with df_ref. (df_mws_dump, df_ref_debug): Use macros to hide references to df_refs. * cse.c (cse_extended_basic_block): Replaced struct df_ref * with df_ref. * web.c (union_defs, entry_register, replace_ref, web_main): Replaced struct df_ref * with df_ref. (union_defs, replace_ref): Use macros to hide references to df_refs. * global.c (compute_regs_asm_clobbered, build_insn_chain): Replaced struct df_ref * with df_ref. * ifcvt.c (dead_or_predicable): Replaced struct df_ref * with df_ref. * sel-sched-ir.c (maybe_downgrade_id_to_use, setup_id_reg_sets, ): Replaced struct df_ref * with df_ref. * ira-lives.c (mark_ref_live, def_conflicts_with_inputs_p, mark_ref_dead, process_bb_node_lives): Replaced struct df_ref * with df_ref. * local-alloc.c (block_alloc): Replaced struct df_ref * with df_ref. * df-byte-scan.c (df_compute_accessed_bytes_extract, df_compute_accessed_bytes_strict_low_part, df_compute_accessed_bytes_subreg, df_compute_accessed_bytes): Replaced struct df_ref * with df_ref. (df_compute_accessed_bytes): Use macros to hide references to df_refs. * init-regs.c (initialize_uninitialized_regs): Replaced struct df_ref * with df_ref. * loop-invariant.c (invariant_for_use, hash_invariant_expr_1, check_dependency, check_dependencies, record_uses): Replaced struct df_ref * with df_ref. (invariant_for_use, check_dependency): Use macros to hide references to df_refs. * loop-iv.c (iv_analysis_loop_init, iv_get_reaching_def, get_biv_step_1, get_biv_step, record_iv, iv_analyze_def, iv_analyze, biv_p): Replaced struct df_ref * with df_ref. (iv_analysis_loop_init, iv_get_reaching_def): Use macros to hide references to df_refs. * ira.c (compute_regs_asm_clobbered): Replaced struct df_ref * with df_ref. * combine.c (create_log_links): Replaced struct df_ref * with df_ref. * df-problems.c (df_rd_bb_local_compute_process_def, df_lr_bb_local_compute, df_live_bb_local_compute, df_chain_create, df_chain_unlink_1, df_chain_unlink, df_chain_copy, df_chain_remove_problem, df_chain_create_bb_process_use, df_chain_create_bb, df_chain_top_dump, df_chain_bottom_dump, df_byte_lr_check_regs, df_byte_lr_bb_local_compute, df_byte_lr_simulate_defs, df_byte_lr_simulate_uses, df_byte_lr_simulate_artificial_refs_at_top, df_byte_lr_simulate_artificial_refs_at_end, df_create_unused_note, df_note_bb_compute, df_note_add_problem, df_simulate_defs, df_simulate_uses, df_simulate_artificial_refs_at_end, df_simulate_artificial_refs_at_top): Replaced struct df_ref * with df_ref. (df_chain_dump): Use macros to hide references to df_refs. * config/mips/mips.c (r10k_simplify_address): Replaced struct df_ref * with df_ref. * dce.c (mark_nonreg_stores, delete_corresponding_reg_eq_notes, mark_artificial_uses, mark_reg_dependencies, byte_dce_process_block): Replaced struct df_ref * with df_ref. From-SVN: r141067
2008-10-07mips.md (mulsi3_mul3, [...]): Merge these ...Adam Nemet1-24/+10
* config/mips/mips.md (mulsi3_mul3, muldi3_mul3): Merge these ... (mul<mode>3_mul3): ... into this new template. testsuite/ * gcc.target/mips/mips.exp (dg-mips-options): Set mips_new_gp to 32 when -march=r3900 is passed. * testsuite/gcc.target/mips/r3900-mult.c: New test. From-SVN: r140922
2008-10-06invoke.texi: List r1x000 family under the -march MIPS option.Joshua Kinard4-2/+277
gcc/ 2008-10-06 Joshua Kinard <kumba@gentoo.org> * doc/invoke.texi: List r1x000 family under the -march MIPS option. * config/mips/mips.h (PROCESSOR_R10000): New processor_type. * config/mips/mips.c (mips_cpu_info_table): Add r10000, r12000, r14000 and r16000. (mips_rtx_cost_data): Add a PROCESSOR_R10000 entry. (mips_issue_rate): Handle PROCESSOR_R10000. * config/mips/mips.md (cpu): Add r10000. Include r10000.md. * config/mips/10000.md: New file. From-SVN: r140913
2008-09-26mips.h (ISA_HAS_DMUL3, [...]): Change them to yield false with MIPS16.Adam Nemet1-7/+9
* config/mips/mips.h (ISA_HAS_DMUL3, ISA_HAS_BADDU, ISA_HAS_BBIT, ISA_HAS_CINS, ISA_HAS_EXTS, ISA_HAS_SEQ_SNE, ISA_HAS_POP): Change them to yield false with MIPS16. From-SVN: r140714
2008-09-22re PR target/37593 (-mlong-calls doesn't affect calls to _mcount generated ↵David Daney1-1/+12
with -pg) 2008-09-22 David Daney <ddaney@avtrex.com> PR target/37593 * config/mips/mips.h (FUNCTION_PROFILER): Call _mcount via a register if TARGET_LONG_CALLS. 2008-09-22 David Daney <ddaney@avtrex.com> PR target/37593 * gcc.target/mips/long-calls-pg.c: New test. From-SVN: r140563
2008-09-22mips.h (ISA_HAS_BADDU): New macro.Adam Nemet2-0/+35
* config/mips/mips.h (ISA_HAS_BADDU): New macro. * config/mips/mips.md (*baddu_si_eb, *baddu_si_el, *baddu_di<mode>): New patterns. testsuite/ * gcc.target/mips/octeon-baddu-1.c: New test. From-SVN: r140556
2008-09-21mips.h (TUNE_OCTEON): New macro.Adam Nemet4-1/+95
* config/mips/mips.h (TUNE_OCTEON): New macro. * config/mips/mips.c (mips_issue_rate): Return 2 for Octeon. (mips_multipass_dfa_lookahead): Return 2 for Octeon. * config/mips/octeon.md: New file. * config/mips/mips.md: Include octeon.md. Restore semi-alphabetical order of include files. From-SVN: r140521
2008-09-06mips.c (mips_function_ok_for_sibcall): Check for DECL being null.Richard Sandiford1-1/+2
gcc/ * config/mips/mips.c (mips_function_ok_for_sibcall): Check for DECL being null. From-SVN: r140056
2008-09-062008-xx-xx Richard Sandiford <rdsandiford@goolemail.com> Peter Fuerst ↵Richard Sandiford5-2/+473
<post@pfrst.de> gcc/ 2008-xx-xx Richard Sandiford <rdsandiford@goolemail.com> Peter Fuerst <post@pfrst.de> * doc/invoke.texi: Document -mr10k-cache-barrier=. * doc/extend.texi: Document __builtin_mips_cache. * config/mips/mips-ftypes.def: Add a (VOID, SI, CVPOINTER) entry. * config/mips/mips.opt (mr10k-cache-barrier=): New option. * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define __GCC_HAVE_BUILTIN_MIPS_CACHE. (TARGET_CACHE_BUILTIN, ISA_HAS_CACHE): New macros. * config/mips/mips.c (mips_r10k_cache_barrier_setting): New enum. (set_push_mips_isas): New variable. (mips_r10k_cache_barrier): New variable. (cache): New availability predicate. (mips_builtins): Add an entry for __builtin_mips_cache. (mips_build_cvpointer_type): New function. (MIPS_ATYPE_CVPOINTER): New macro. (mips_prepare_builtin_arg): Only use the insn's mode if the rtx's mode is VOIDmode. (r10k_simplified_address_p, r10k_simplify_address) (r10k_uncached_address_p, r10k_safe_address_p) (r10k_needs_protection_p_1, r10k_needs_protection_p_store) (r10k_needs_protection_p_call, r10k_needs_protection_p) (r10k_insert_cache_barriers): New functions. (mips_reorg_process_insns): Delete cache barriers after a branch-likely instruction. (mips_reorg): Call r10k_insert_cache_barriers. (mips_handle_option): Handle OPT_mr10k_cache_barrier_. * config/mips/mips.md (UNSPEC_MIPS_CACHE): New constant. (UNSPEC_R10K_CACHE_BARRIER): Likewise. (mips_cache, r10k_cache_barrier): New define_insns. gcc/testsuite/ * gcc.target/mips/mips.exp (dg-mips-options): Make -mr10k-cache-barrier=* imply -mips3 or above. * gcc.target/mips/cache-1.c: New test. * gcc.target/mips/r10k-cache-barrier-1.c: Likewise. * gcc.target/mips/r10k-cache-barrier-2.c: Likewise. * gcc.target/mips/r10k-cache-barrier-3.c: Likewise. * gcc.target/mips/r10k-cache-barrier-4.c: Likewise. * gcc.target/mips/r10k-cache-barrier-5.c: Likewise. * gcc.target/mips/r10k-cache-barrier-6.c: Likewise. * gcc.target/mips/r10k-cache-barrier-7.c: Likewise. * gcc.target/mips/r10k-cache-barrier-8.c: Likewise. * gcc.target/mips/r10k-cache-barrier-9.c: Likewise. * gcc.target/mips/r10k-cache-barrier-10.c: Likewise. * gcc.target/mips/r10k-cache-barrier-11.c: Likewise. * gcc.target/mips/r10k-cache-barrier-12.c: Likewise. * gcc.target/mips/r10k-cache-barrier-13.c: Likewise. * gcc.target/mips/r10k-cache-barrier-14.c: Likewise. * gcc.target/mips/r10k-cache-barrier-15.c: Likewise. From-SVN: r140055
2008-09-05mips.h (enum reg_class): Add FRAME_REGS.Joseph Myers2-2/+5
* config/mips/mips.h (enum reg_class): Add FRAME_REGS. (REG_CLASS_NAMES): Update. (REG_CLASS_CONTENTS): Update. * config/mips/mips.c (mips_regno_to_class): Use FRAME_REGS instead of ALL_REGS for regs 77 and 78. * function.c (instantiate_virtual_regs_in_insn): Assert that return value of simplify_gen_subreg is not NULL. testsuite: * gcc.c-torture/compile/20080903-1.c: New test. From-SVN: r140035
2008-09-04mips.h (ISA_HAS_SEQ_SNE): New macro.Adam Nemet3-8/+43
* config/mips/mips.h (ISA_HAS_SEQ_SNE): New macro. * config/mips/mips.c (mips_expand_scc): Also expand seq and sne if second operand is a reg_imm10_operand. * config/mips/mips.md (*seq_<GPR:mode><GPR2:mode>_seq, *sne_<GPR:mode><GPR2:mode>_sne): New patterns. (*seq_<GPR:mode><GPR2:mode>): Rename to *seq_zero_<GPR:mode><GPR2:mode>. Don't match if ISA_HAS_SEQ_SNE. (*seq_<GPR:mode><GPR2:mode>_mips16): Rename to *seq_zero_<GPR:mode><GPR2:mode>_mip16. Don't match if ISA_HAS_SEQ_SNE. (*sne_<GPR:mode><GPR2:mode>): Rename to *sne_zero_<GPR:mode><GPR2:mode>. Don't match if ISA_HAS_SEQ_SNE. testsuite/ * gcc.target/mips/seq-1.c: New test. * gcc.target/mips/octeon-seq-1.c: New test. * gcc.target/mips/octeon-seq-2.c: New test. * gcc.target/mips/octeon-seq-3.c: New test. * gcc.target/mips/octeon-seq-4.c: New test. * gcc.target/mips/scc-2.c: Also pass on sltiu. * gcc.target/mips/scc-3.c: Likewise. From-SVN: r140010
2008-09-04mips.h (ISA_HAS_EXTS): New macro.Adam Nemet2-12/+63
* config/mips/mips.h (ISA_HAS_EXTS): New macro. * config/mips/mips.md (*ashr_trunc<mode>): Name the pattern combining an arithmetic right shift by more than 31 and a trunction. Don't match for out-of-range shift amounts. Set attribute mode to <MODE>. (*lshr32_trunc<mode>): Name the pattern combining a logical right shift by 32 and and a truncation. Set attribute mode to <MODE>. (*<optab>_trunc<mode>_exts): New pattern for truncated right shifts by less than 32. (extv): Change predicate on first operand to accept registers. Change predicate of the other operands from immediate_operand to const_int_operand. Expand exts when source is a register. (extzv): Change predicate of the constant operands from immediate_operand to const_int_operand. (extzv<mode>): Change predicate of the constant operands from immediate_operand to const_int_operand and no constraint. Also remove mode. (*extzv_trunc<mode>_exts): New pattern. testsuite/ * gcc.target/mips/truncate-2.c: New test. * gcc.target/mips/octeon-exts-1.c: New test. * gcc.target/mips/octeon-exts-2.c: New test. * gcc.target/mips/octeon-exts-3.c: New test. * gcc.target/mips/octeon-exts-4.c: New test. From-SVN: r140009
2008-09-04mips.h (ISA_HAS_CINS): New macro.Adam Nemet4-0/+63
* config/mips/mips.h (ISA_HAS_CINS): New macro. * config/mips/mips-protos.h (mask_low_and_shift_p, mask_low_and_shift_len): Declare. * config/mips/mips.c (mask_low_and_shift_p, mask_low_and_shift_len): New functions. (mips_print_operand): Handle new operand prefix "m". * config/mips/mips.md (*cins<mode>): New pattern. testsuite/ * gcc.target/mips/octeon-cins-1.c: New test. * gcc.target/mips/octeon-cins-2.c: New test. From-SVN: r140008
2008-09-01expr.c (MOVE_BY_PIECES_P, [...]): Pass speed operand.Jan Hubicka1-6/+6
* expr.c (MOVE_BY_PIECES_P, CLEAR_BY_PIECES_P, SET_BY_PIECES_P): Pass speed operand. * expr.h (MOVE_RATIO, CLEAR_RATIO, SET_RATIO): Update. * gimplify.c (gimplify_init_constructor): Add speed operand. * tree-sra.c (decide_block_copy): Likewise. * tree-inline.c (estimate_move_cost): Likewise. * config/alpha/alpha.h (MOVE_RATIO): Update. * config/frv/frv.c (MOVE_RATIO): Update. * config/spu/spu.h (MOVE_RATIO): Update. * config/sparc/sparc.h (MOVE_RATIO): Update. * config/i386/i386.h (MOVE_RATIO, CLEAR_RATIO): Update. * config/m68hc11/m68hc11.h (MOVE_RATIO): Update. * config/cris/cris.h (MOVE_RATIO): Update. * config/mn10300/mn10300.h (MOVE_RATIO): Update. * config/arm/arm.h (MOVE_RATIO): Update. * config/pa/pa.md: Update uses of MOVE_RATIO * config/pa/pa.h (MOVE_RATIO): Update. * config/mips/mips.h (MOVE_RATIO, MOVE_BY_PIECES, CLEAR_RATIO, SET_RATIO): Update. * config/h8300/h8300.h (MOVE_RATIO): Update. * config/v850/v850.h (MOVE_RATIO): Update. * config/bfin/bfin.h (MOVE_RATIO): Update. From-SVN: r139855
2008-08-31fwprop.c (should_replace_address): Add speed attribute.Jan Hubicka1-18/+19
* fwprop.c (should_replace_address): Add speed attribute. (PR_OPTIMIZE_FOR_SPEED): New flag. (propagate_rtx_1): Use it. (propagate_rtx): Set it. (try_fwprop_subst): Update call of rtx_costs. (forward_propagate_and_simplify): LIkewise. * hooks.c (hook_int_rtx_bool_0): New (hook_bool_rtx_int_int_intp_false): Replace by ... (hook_bool_rtx_int_int_intp_bool_false): .. thisone. * hooks.h (hook_int_rtx_bool_0): New (hook_bool_rtx_int_int_intp_false): Replace by ... (hook_bool_rtx_int_int_intp_bool_false): .. thisone. * optabs.c (avoid_expensive_constant): UPdate call of rtx_cost. (prepare_cmp_insn): UPdate call of rtx_cost. * postreload.c (reload_cse_simplify_set): Update call of rtx_cost. (reload_cse_simplify_operands): Update call of rtx_cost. (reload_cse_move2add): call of rtx_cost. * target.h (struct gcc_target): Update rtx_costs and address_costs. * rtlanal.c (rtx_cost): Add speed argument. (address_cost): Add speed argument (default_address_cost): Likewise. (insn_rtx_cost): Likewise. * cfgloopanal.c (seq_cost): Add speed argument. (target_reg_cost, target_spill_cost): Turn to array. (init_set_costs): Update for speed. (estimate_reg_pressure_cost): Add speed argument. * auto-inc-dec.c (attempt_change): Update call of rtx_cost. * dojump.c (prefer_and_bit_test): UPdate call of rtx_cost. * tree-ssa-loop-ivopts.c (struct ivopts_data): New field speed. (seq_cost): Add speed argument. (computation_cost): Add speed arugment. (add_cost, multiply_by_const, get_address_cost): add speed argument. (force_expr_to_var_cost): Update for profile info. (force_var_cost): Likewise. (split_address_cost): Likewise. (ptr_difference_cost): Likewise. (difference_cost): Likewise. (get_computation_cost_at): Likewise. (determine_iv_cost): Likewise. (ivopts_global_cost_for_size): Likewise. (rewrite_use_address): Likewise. (tree_ssa_iv_optimize_loop): Initialize speed field. * cse.c (optimize_this_for_speed_p): New static var. (notreg_cost): Update call of rtx_cost. (cse_extended_basic_block): set optimize_this_for_speed_p. * ifcvt.c (cheap_bb_rtx_cost_p): Update call of rtx_cost. (noce_try_cmove_arith): Likewise. (noce_try_sign_mask): LIkewise. * expr.c (compress_float_constant): Update rtx_cost calls. * tree-ssa-address.c (most_expensive_mult_to_index): Add speed argument. (addr_to_parts): Likewise. (create_mem_ref): Likewise. * dse.c (find_shift_sequence): Add speed argument. (replace_read): Update call. * calls.c (precompute_register_parameters): Update call of rtx_cost. * expmed.c (sdiv_pow2_cheap, smod_pow2_cheap, zero_cost, add_cost, * neg_cost, shift_cost, shiftadd_cost, shiftsub_cost, mul_cost, sdiv_cost, udiv_cost ,mul_widen_cost, mul_highpart_cost): Increase dimension. (init_expmed): Initialize for both size and speed. (expand_shift): Use profile. (synth_mult): Use profile. (choose_mult_variant): Use profile. (expand_mult): Use profile. (expand_mult_highpart_optab): Use profile. (expand_mult_highpart): Use profile. (expand_smod_pow2): Use profile. (expand_divmod): Use profile. * simplify-rtx.c (simplify_binary_operation_1): Update call of rtx_cost. * loop-invariant.c (create_new_invariant): Use profile. (gain_for_invariant): Add speed parameter. (best_gain_for_invariant): Likewise. (find_invariants_to_move): Likewise. (move_single_loop_invariants): Set it. * target-def.h (TARGET_RTX_COSTS): Use hook. * rtl.h (rtx_cost, address_cost, insn_rtx_cost): Update prototpe. (optimize_insn_for_size_p, optimize_insn_for_speed_p): Declare. * output.h (default_address_cost): Update prototype. * combine.c (optimize_this_for_speed_p): New static var. (combine_validate_cost): Update call of rtx_cost. (combine_instructions): Set optimize_this_for_speed_p. (expand_compound_operation): Update call of rtx_cost. (make_extraction):Update call of rtx_cost. (force_to_mode):Update call of rtx_cost. (distribute_and_simplify_rtx):Update call of rtx_cost. * cfgloop.h (target_reg_cost, target_spill_cost): Turn to array. (estimate_reg_pressure_cost): Update prototype. * tree-flow.h (multiply_by_cost, create_mem_ref): Update prototype. * basic-block.h (optimize_insn_for_size_p, optimize_insn_for_speed_p): Remove. * config/alpha/alpha.c (alpha_rtx_costs): Update. (alpha_rtx_costs): Update. * config/frv/frv.c (frv_rtx_costs): Update. * config/s390/s390.c (s390_rtx_costs): Update. * config/m32c/m32c.c (m32c_memory_move_cost): Update. (m32c_rtx_costs): Update. * config/spu/spu.c (TARGET_ADDRESS_COST): Upate. (spu_rtx_costs): Update. * config/sparc/sparc.c (sparc_rtx_costs): Update. * config/m32r/m32r.c (m32r_rtx_costs): Update. * config/i386/i386.c (:ix86_address_cost): Update. (ix86_rtx_costs): Update. * config/sh/sh.c (sh_rtx_costs, sh_address_cost): Update. * config/pdp11/pdp11.c (pdp11_rtx_costs): Update. * config/avr/avr.c (avr_rtx_costs, avr_address_cost): Update. * config/crx/crx.c (crx_address_cost): Update. * config/xtensa/xtensa.c (xtensa_rtx_costs): Update. * config/stormy16/stormy16.c (xstormy16_address_cost, xstormy16_rtx_costs): Update. * config/m68hc11/m68hc11.c (m68hc11_address_cost, m68hc11_rtx_costs): Update. * config/cris/cris.c (cris_rtx_costs, cris_address_cost): Update. * config/iq2000/iq2000.c (iq2000_rtx_costs, iq2000_address_cost): Update. * config/mn10300/mn10300.c (mn10300_address_cost, mn10300_rtx_costs): Update * config/ia64/ia64.c (ia64_rtx_costs): Update. * config/m68k/m68k.c (m68k_rtx_costs): Update. * config/rs6000/rs6000.c (rs6000_rtx_costs): Update. * config/arc/arc.c (arc_rtx_costs, arc_address_cost): Update. * config/mcore/mcore.c (TARGET_ADDRESS_COST): Update. (mcore_rtx_costs): update. * config/score/score3.c (score3_rtx_costs): Update. * config/score/score7.c (score7_rtx_costs): Update. * config/score/score3.h (score3_rtx_costs):Update. * config/score/score7.h (score7_rtx_costs): Update. * config/score/score.c (score_rtx_costs): Update. * config/arm/arm.c (arm_address_cost): Update. (arm_rtx_costs_1): Update. (arm_rtx_costs_1): Update. (arm_size_rtx_costs): Update. (arm_size_rtx_costs): Update. (arm_size_rtx_costs): Update. (arm_xscale_rtx_costs): Update. (arm_thumb_address_cost): Update. * config/pa/pa.c (hppa_address_cost): Update. * config/mips/mips.c (mips_rtx_costs): Update. * config/vax/vax.c (vax_address_cost): Update. * config/h8300/h8300.c (h8300_shift_costs): Update. (h8300_rtx_costs): Update. * config/v850/v850.c (TARGET_ADDRESS_COST): Update. (v850_rtx_costs): Update. * config/mmix/mmix.c (mmix_rtx_costs, mmix_rtx_costs): Update. * config/bfin/bfin.c (bfin_address_cost): Update. (bfin_rtx_costs): Update. * stmt.c (lshift_cheap_p): Update. From-SVN: r139821
generated by cgit v1.1 at 2024-11-04 15:10:03 +0000