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| author | Adam Nemet <anemet@caviumnetworks.com> | 2008-10-07 00:30:00 +0000 |
|---|---|---|
| committer | Adam Nemet <nemet@gcc.gnu.org> | 2008-10-07 00:30:00 +0000 |
| commit | 4c6f9770100ef079f2ce2743b320f6705b03dd4f (patch) | |
| tree | 759e54799611048940851e86e582891cdfdbc086 /gcc/config/mips | |
| parent | 2018c607607892f7a17c58495bbc4ccb54ad6c8b (diff) | |
| download | gcc-4c6f9770100ef079f2ce2743b320f6705b03dd4f.zip gcc-4c6f9770100ef079f2ce2743b320f6705b03dd4f.tar.gz gcc-4c6f9770100ef079f2ce2743b320f6705b03dd4f.tar.bz2 | |
mips.md (mulsi3_mul3, [...]): Merge these ...
* config/mips/mips.md (mulsi3_mul3, muldi3_mul3): Merge these ...
(mul<mode>3_mul3): ... into this new template.
testsuite/
* gcc.target/mips/mips.exp (dg-mips-options): Set mips_new_gp to
32 when -march=r3900 is passed.
* testsuite/gcc.target/mips/r3900-mult.c: New test.
From-SVN: r140922
Diffstat (limited to 'gcc/config/mips')
| -rw-r--r-- | gcc/config/mips/mips.md | 34 |
1 files changed, 10 insertions, 24 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 6ae6c0b..3f56feb 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1367,35 +1367,21 @@ DONE; }) -(define_insn "mulsi3_mul3" - [(set (match_operand:SI 0 "register_operand" "=d,l") - (mult:SI (match_operand:SI 1 "register_operand" "d,d") - (match_operand:SI 2 "register_operand" "d,d"))) - (clobber (match_scratch:SI 3 "=l,X"))] - "ISA_HAS_MUL3" +(define_insn "mul<mode>3_mul3" + [(set (match_operand:GPR 0 "register_operand" "=d,l") + (mult:GPR (match_operand:GPR 1 "register_operand" "d,d") + (match_operand:GPR 2 "register_operand" "d,d"))) + (clobber (match_scratch:GPR 3 "=l,X"))] + "ISA_HAS_<D>MUL3" { if (which_alternative == 1) - return "mult\t%1,%2"; - if (TARGET_MIPS3900) + return "<d>mult\t%1,%2"; + if (<MODE>mode == SImode && TARGET_MIPS3900) return "mult\t%0,%1,%2"; - return "mul\t%0,%1,%2"; + return "<d>mul\t%0,%1,%2"; } [(set_attr "type" "imul3,imul") - (set_attr "mode" "SI")]) - -(define_insn "muldi3_mul3" - [(set (match_operand:DI 0 "register_operand" "=d,l") - (mult:DI (match_operand:DI 1 "register_operand" "d,d") - (match_operand:DI 2 "register_operand" "d,d"))) - (clobber (match_scratch:DI 3 "=l,X"))] - "ISA_HAS_DMUL3" -{ - if (which_alternative == 1) - return "dmult\t%1,%2"; - return "dmul\t%0,%1,%2"; -} - [(set_attr "type" "imul3,imul") - (set_attr "mode" "DI")]) + (set_attr "mode" "<MODE>")]) ;; If a register gets allocated to LO, and we spill to memory, the reload ;; will include a move from LO to a GPR. Merge it into the multiplication |