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author | Richard Sandiford <rdsandiford@googlemail.com> | 2008-12-02 22:33:06 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2008-12-02 22:33:06 +0000 |
commit | 1ba62f90e187e93b37d2bc88a818caa42ad51619 (patch) | |
tree | afb32068784d9d1cc8dd49b75ef26fed5ac2f868 /gcc/config/mips | |
parent | 0767b03f5e572d1b80604ce01090d9fc0ad406d3 (diff) | |
download | gcc-1ba62f90e187e93b37d2bc88a818caa42ad51619.zip gcc-1ba62f90e187e93b37d2bc88a818caa42ad51619.tar.gz gcc-1ba62f90e187e93b37d2bc88a818caa42ad51619.tar.bz2 |
Sorry, committed the wrong version of the last patch.
From-SVN: r142376
Diffstat (limited to 'gcc/config/mips')
-rw-r--r-- | gcc/config/mips/mips.md | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 698d57c..b9226c5 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3985,9 +3985,9 @@ ;; load are 2 2 byte instructions. (define_split - [(set (match_operand:IMOVE32 0 "d_operand") - (mem:IMOVE32 (plus:SI (match_dup 0) - (match_operand:SI 1 "const_int_operand"))))] + [(set (match_operand:SI 0 "d_operand") + (mem:SI (plus:SI (match_dup 0) + (match_operand:SI 1 "const_int_operand"))))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE && ((INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -0x80) @@ -3996,8 +3996,8 @@ || (INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) < 32 * 4 && (INTVAL (operands[1]) & 3) != 0))" - [(set (match_dup 3) (plus:SI (match_dup 0) (match_dup 1))) - (set (match_dup 0) (mem:IMOVE32 (plus:SI (match_dup 3) (match_dup 2))))] + [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1))) + (set (match_dup 0) (mem:SI (plus:SI (match_dup 0) (match_dup 2))))] { HOST_WIDE_INT val = INTVAL (operands[1]); @@ -4017,7 +4017,6 @@ operands[1] = GEN_INT (off); operands[2] = GEN_INT (val - off); } - operands[3] = gen_rtx_REG (SImode, REGNO (operands[0])); }) ;; On the mips16, we can split a load of certain constants into a load |