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path: root/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
AgeCommit message (Expand)AuthorFilesLines
3 hours[AMDGPU] gfx1250 v_wmma_ld_scale instructions (#152010)Stanislav Mekhanoshin1-42/+78
10 days[AMDGPU] Support AMDGPUClamp for bf16 on gfx1250 (#150663)Changpeng Fang1-0/+6
11 days[AMDGPU] Add v_fma_mix_f32_f16 as an alias of v_fma_mix_f32 on gfx1250 (#150502)Changpeng Fang1-0/+3
11 days[AMDGPU] Support V_FMA_MIX*_BF16 instructions on gfx1250 (#150381)Changpeng Fang1-54/+84
12 days[AMDGPU] Support V_PK_MIN3/MAX3_NUM_F16 on gfx1250 (#150326)Changpeng Fang1-1/+10
12 daysAMDGPU: Support V_PK_MAXIMUM3_F16 and V_PK_MINIMUM3_F16 on gfx1250 (#150307)Changpeng Fang1-0/+2
12 daysAMDGPU: Support packed bf16 instructions on gfx1250 (#150283)Changpeng Fang1-0/+13
12 daysAMDGPU: Add packed fp32 instructions for gfx1250 (#150253)Changpeng Fang1-0/+4
13 daysAMDGPU: Support V_PK_ADD_{MIN|MAX}_{I|U}16 and V_{MIN|MAX}3_{I|U}16 on gfx125...Changpeng Fang1-0/+54
2025-07-21AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)Changpeng Fang1-33/+89
2025-07-15AMDGPU: Support intrinsic selection for gfx1250 wmma instructions (#148957)Changpeng Fang1-21/+66
2025-07-15AMDGPU: Implement MC layer support for gfx1250 wmma instructions. (#148570)Changpeng Fang1-68/+259
2025-07-08[AMDGPU] Add FeatureIEEEMinimumMaximumInsts. NFCI. (#147594)Stanislav Mekhanoshin1-2/+2
2025-06-05[AMDGPU][MC] Allow dpp in v_dot2_f32_bf16 for GFX11 and 12 (#142451)Jun Wang1-1/+4
2025-05-21[AMDGPU] Fix scale opsel flags for scaled MFMA operations (#140183)Vigneshwar Jayakumar1-8/+7
2025-04-21[AMDGPU] Correct VOP3P encoding. NFC. (#136005)Stanislav Mekhanoshin1-20/+20
2025-03-01AMDGPU: Sort an instruction definition by opcode (#129350)Matt Arsenault1-1/+1
2025-02-21AMDGPU: Form v2f16 minimum3/maximum3 on gfx950 (#128123)Matt Arsenault1-2/+2
2025-02-19[AMDGPU] Add `isAsCheapAsAMove` for `v_pk_mov_b32` (#127632)Shilei Tian1-1/+1
2025-02-13[AMDGPU] Simplify OtherPredicates handling in MadFmaMixPats. NFC. (#127044)Jay Foad1-11/+8
2025-02-11[AMDGPU][True16][CodeGen] true16 codegen for MadFmaMixPat (#124892)Brox Chen1-32/+79
2024-12-18[AMDGPU][MC] Disallow op_sel in some VOP3P dot instructions (#100485)Jun Wang1-5/+5
2024-12-13AMDGPU: Fix entry for mac in VGPR->AGPR MFMA table (#119693)Matt Arsenault1-1/+1
2024-12-09[AMDGPU] New GFX11+ aliases v_dot4_i32_i8 and v_dot8_i32_i4 (#118997)Jay Foad1-0/+5
2024-12-02AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (#1...Matt Arsenault1-9/+14
2024-11-26AMDGPU: Make v2f16 minimum/maximum legal for gfx950 (#117738)Matt Arsenault1-0/+11
2024-11-25AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (#117601)Matt Arsenault1-0/+8
2024-11-25AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (#117597)Matt Arsenault1-2/+3
2024-11-22AMDGPU: Add v_smfmac_f32_32x32x64_fp8_fp8 for gfx950 (#117259)Matt Arsenault1-0/+2
2024-11-22AMDGPU: Add v_smfmac_f32_32x32x32x64_fp8_bf8 for gfx950 (#117258)Matt Arsenault1-0/+2
2024-11-22AMDGPU: Add v_smfmac_f32_32x32x64_bf8_fp8 for gfx950 (#117257)Matt Arsenault1-0/+2
2024-11-22AMDGPU: Add v_smfmac_f32_32x32x64_bf8_bf8 for gfx950 (#117256)Matt Arsenault1-0/+3
2024-11-21AMDGPU: Add v_smfmac_f32_16x16x128_fp8_fp8 for gfx950 (#117235)Matt Arsenault1-0/+2
2024-11-21AMDGPU: Add v_smfmac_f32_16x16x128_fp8_bf8 for gfx950 (#117234)Matt Arsenault1-0/+2
2024-11-21AMDGPU: Add v_smfmac_f32_16x16x128_bf8_fp8 for gfx950 (#117233)Matt Arsenault1-0/+2
2024-11-21AMDGPU: Add v_smfmac_f32_16x16x128_bf8_bf8 for gfx950 (#117232)Matt Arsenault1-0/+5
2024-11-21AMDGPU: Add v_smfmac_i32_32x32x64_i8 for gfx950 (#117214)Matt Arsenault1-0/+3
2024-11-21AMDGPU: Add v_smfmac_i32_16x16x128_i8 for gfx950 (#117213)Matt Arsenault1-0/+3
2024-11-21AMDGPU: Add v_smfmac_f32_32x32x32_bf16 for gfx950 (#117212)Matt Arsenault1-0/+3
2024-11-21AMDGPU: Add v_smfmac_f32_16x16x64_bf16 for gfx950 (#117211)Matt Arsenault1-0/+3
2024-11-21AMDGPU: Add v_smfmac_f32_32x32x32_f16 for gfx950 (#117205)Matt Arsenault1-0/+3
2024-11-21AMDGPU: Add v_smfmac_f32_16x16x64_f16 for gfx950 (#117202)Matt Arsenault1-0/+7
2024-11-21AMDGPU: Add v_mfma_f32_16x16x32_bf16 for gfx950 (#117053)Matt Arsenault1-0/+5
2024-11-21AMDGPU: Add v_mfma_i32_32x32x32_i8 for gfx950 (#117052)Matt Arsenault1-0/+6
2024-11-21AMDGPU: Add v_mfma_i32_16x16x64_i8 for gfx950 (#116728)Matt Arsenault1-0/+7
2024-11-21AMDGPU: Optimize mfma_scale intrinsics with 0 inputs (#116724)Matt Arsenault1-3/+3
2024-11-21AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)Matt Arsenault1-18/+295
2024-11-20AMDGPU: Add v_mfma_ld_scale_b32 for gfx950 (#116722)Matt Arsenault1-0/+11
2024-11-19AMDGPU: Clean up more real instruction predicate overrides (#116868)Matt Arsenault1-26/+16
2024-11-18AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 (#116679)Matt Arsenault1-0/+6
generated by cgit v1.1 at 2025-08-04 21:19:47 +0000