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AgeCommit message (Expand)AuthorFilesLines
6 hours[AMDGPU] Constrain register class during COPY elimination based on their uses...Chinmay Deshpande1-0/+20
10 hours[AMDGPU][SIInsertWaitcnts][NFC] Move soft xcnt deletion to separate function ...vporpo1-72/+42
12 hours[AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (#178868)Dark Steve1-6/+73
19 hoursAMDGPU: Use fpmath metadata on f16 log/log10 intrinsics (#180489)Matt Arsenault1-1/+46
19 hours[AMDGPULowerLDS] Avoid unnecessary ptrtoint/inttoptr roundtrip (#181671)Nikita Popov1-19/+12
19 hours[AMDGPU] Add VDSDIR encoding to gfx13 (#181620)Mariusz Sikora1-10/+14
19 hours[AMDGPU] Add missing comma between export target and first export data (#181641)Mariusz Sikora1-2/+2
32 hoursAMDGPU: Use promotion to f32 path for log/log10 for f16 by default (#180240)Matt Arsenault2-7/+21
2 days[RFC][IR] Remove `Constant::isZeroValue` (#181521)Shilei Tian2-3/+3
5 days[AMDGPU] Avoid unnecessary zero-index GEPsNikita Popov2-11/+2
5 days[AMDGPU] Change 9 SWMMAC builtins to use 64-bit index (#181246)Stanislav Mekhanoshin2-6/+20
5 daysAMDGPU/GlobalISel: Regbanklegalize rules for buffer load lds intrinsics (#180...vangthao951-0/+13
6 days[NFC][AMDGPU] Remove unused `getLDSSize` (#181133)Juan Manuel Martinez Caamaño1-8/+0
6 days[NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (#181131)Juan Manuel Martinez Caamaño2-17/+0
6 daysReapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (#180954)sstipano8-129/+129
6 days[AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert ...Lucas Ramirez2-38/+50
6 days[AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bi...zGoldthorpe1-0/+20
6 days[AMDGPU][GlobalIsel] Add register bank legalization rules for buffer atomic i...Syadus Sefat1-1/+4
6 days[AMDGPU] Treat F64 TRANS instructions as VALU for S_DELAY_ALU insertion (#180...Jay Foad1-1/+3
6 daysAMDGPU/GlobalISel: RegBankLegalize for global atomic ordered add (#180829)vangthao951-0/+3
6 days[AMDGPU] Add known bits for G_AMDGPU_COPY_SCC_VCC (#180560)vangthao951-0/+5
7 days[AMDGPU] Introduce asyncmark/wait intrinsics (#180467)Sameer Sahasrabuddhe4-14/+300
7 days[AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (#180466)Sameer Sahasrabuddhe9-37/+115
7 days[AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async s...Alexander Weinrauch1-8/+14
7 days[AMDGPU] Use enum instead of literal for MadFmaMixFP16Pats (#180802)hjagasiaAMD1-3/+3
7 days[AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (#180688)Changpeng Fang1-70/+66
7 daysAMDGPU/GlobalISel: RegBankLegalize rules for buffer atomic cmpswap (#180666)vangthao951-0/+6
7 days[AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (#180574)Ryan Mitchell3-101/+101
8 days[AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (#180516)Mirko Brkušanin2-6/+7
8 days[AMDGPU] Add legalization rules for atomicrmw max/min ops (#180502)Anshil Gandhi1-7/+10
8 days[AMDGPU] Add intrinsic exposing s_alloc_vgpr (#163951)Diana Picus5-2/+41
8 days[AMDGPU] Non convergent instruction does not depend on EXEC. NFCI. (#179821)Stanislav Mekhanoshin1-0/+4
8 daysAMDGPU/GlobalISel: Regbanklegalize rules for G_FSQRT (#179817)vangthao951-0/+6
8 days[AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType ...vporpo3-81/+110
8 days[AMDGPU] Enable sinking of free vector ops that will be folded into their use...Gheorghe-Teodor Bercea1-1/+53
8 daysAMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sffbh (#180099)vangthao951-0/+4
8 daysAMDGPU/GlobalISel: Regbanklegalize rules for buffer atomic swap (#180265)vangthao951-0/+4
9 days[AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (#175257)Anshil Gandhi1-0/+22
9 days[AMDGPU] Fix instruction size for 64-bit literal constant operands (#180387)Shilei Tian1-1/+8
9 days[AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (#180191)Mirko Brkušanin5-23/+45
9 days[AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (#179...Petr Kurapov1-2/+1
9 days[AMDGPU] Remove `NoNaNsFPMath` uses (#180469)paperchalice2-9/+2
9 days[AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (#177343)Pierre van Houtryve7-40/+118
9 daysAMDGPU: Add syntax for s_wait_event values (#180272)Matt Arsenault8-4/+93
9 daysAMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (#180170)Matt Arsenault1-4/+2
9 days[SelectionDAGBuilder] Remove NoNaNsFPMath uses (#169904)paperchalice4-8/+8
9 daysRevert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (#180421)Qinkun Bao2-6/+5
10 days[AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions pr...vporpo1-19/+24
10 days[AMDGPU][GlobalISel] Add lowering for G_FMODF (#180152)Alex Wang1-0/+10
11 days[NFC][LiveStacks] Use vectors instead of map and unordred_map (#165477)Ralender2-5/+6
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