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path: root/llvm/lib/Target/AMDGPU/SIInstrInfo.h
AgeCommit message (Expand)AuthorFilesLines
7 days[AMDGPU][gfx1250] Use SCOPE_SE for stores that may hit scratch (#150586)Pierre van Houtryve1-0/+6
10 days[AMDGPU] Simplify SIInstrInfo::isLegalToSwap. NFC. (#149058)Jay Foad1-2/+1
2025-07-21[AMDGPU] ISel & PEI for whole wave functions (#145858)Diana Picus1-0/+2
2025-07-18AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)Matt Arsenault1-1/+0
2025-07-18AMDGPU: Always use AV spill pseudos on targets with AGPRs (#149099)Matt Arsenault1-0/+10
2025-07-16AMDGPU: Treat WMMA XDL ops as TRANS in S_DELAY_ALU insertion for gfx1250 (#14...Changpeng Fang1-0/+2
2025-07-15[AMDGPU] gfx1250 64-bit relocations and fixups (#148951)Stanislav Mekhanoshin1-6/+10
2025-07-08[AMDGPU] Fix broken uses of isLegalFLATOffset and splitFlatOffset (#147469)Fabian Ritter1-2/+1
2025-06-04[AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVA...Brox Chen1-0/+2
2025-05-07[AMDGPU] Classify FLAT instructions as VMEM (#137148)Robert Imschweiler1-1/+1
2025-04-25Reland [AMDGPU] Support block load/store for CSR #130013 (#137169)Diana Picus1-0/+14
2025-04-23Revert "[AMDGPU] Support block load/store for CSR" (#136846)Diana Picus1-14/+0
2025-04-23[AMDGPU] Support block load/store for CSR (#130013)Diana Picus1-0/+14
2025-04-22[AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (#134629)Frederik Harwath1-0/+2
2025-04-11[AMDGPU] Teach iterative schedulers about IGLP (#134953)Jeffrey Byrnes1-0/+6
2025-04-03[AMDGPU][True16][CodeGen] legalize operands when move16bit SALU to VALU (#133...Brox Chen1-0/+4
2025-03-04[AMDGPU] Remove unused s_barrier_{init,join,leave} instructions (#129548)Mariusz Sikora1-5/+0
2025-02-28[AMDGPU][NFC] Move isXDL and isDGEMM to SIInstrInfo. (#129103)sstipano1-0/+4
2025-02-24[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister....Craig Topper1-1/+1
2025-02-18AMDGPU: Extract lambda used in foldImmediate into a helper function (#127484)Matt Arsenault1-0/+9
2025-02-18AMDGPU: Implement getConstValDefinedInReg and use in foldImmediate (NFC) (#12...Matt Arsenault1-4/+18
2025-02-16[AMDGPU] Remove materializeImmediate (#127420)Kazu Hirata1-4/+0
2025-02-12[TableGen] Emit OpName as an enum class instead of a namespace (#125313)Rahul Joshi1-11/+12
2025-01-22[llvm] Pass MachineInstr flags to storeRegToStackSlot/loadRegFromStackSlot (N...Venkata Ramanaiah Nalamothu1-12/+11
2025-01-22[AMDGPU] Add commute for some VOP3 inst (#121326)Shoreshen1-3/+7
2025-01-11[AMDGPU] Add target hook to isGlobalMemoryObject (#112781)Austin Kerbow1-0/+9
2024-12-18[AMDGPU] Make max dwords of memory cluster configurable (#119342)Ruiling, Song1-0/+2
2024-12-02AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (#1...Matt Arsenault1-0/+5
2024-11-21AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)Matt Arsenault1-0/+6
2024-11-06[AMDGPU] modify named barrier builtins and intrinsics (#114550)Gang Chen1-2/+2
2024-10-03[AMDGPU] Qualify auto. NFC. (#110878)Jay Foad1-2/+2
2024-09-24[AMDGPU][MC] Disallow null as saddr in flat instructions (#101730)Jun Wang1-4/+6
2024-09-19[AMDGPU] Add MachineVerifier check to detect illegal copies from vector regis...Aditi Medhane1-0/+3
2024-09-11[AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (#107889)Jay Foad1-2/+0
2024-09-05[AMDGPU] V_SET_INACTIVE optimizations (#98864)Carl Ritson1-0/+2
2024-08-27[TII][RISCV] Add renamable bit to copyPhysReg (#91179)Piyou Chen1-1/+2
2024-08-23[AMDGPU] Remove dead pass: AMDGPUMachineCFGStructurizer (#105645)Juan Manuel Martinez Caamaño1-8/+0
2024-08-17[AMDGPU] Disable inline constants for pseudo scalar transcendentals (#104395)Carl Ritson1-0/+8
2024-07-17[AMDGPU] Update hasUnwantedEffectsWhenEXECEmpty (#97982)Carl Ritson1-1/+17
2024-07-09[AMDGPU] Update EXECZ retention in SIPreEmitPeephole for GFX10/12 (#97676)Carl Ritson1-0/+23
2024-07-06[llvm] Remove redundant calls to std::unique_ptr<T>::get (NFC) (#97778)Kazu Hirata1-1/+1
2024-05-01[AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (#90595)David Stuttard1-0/+11
2024-04-24[AMDGPU] Add a trap lowering workaround for gfx11 (#85854)Emma Pilkington1-0/+9
2024-03-19AMDGPU: Treat SWMMAC the same as MFMA and other WMMA for sched_barrier (#85721)Changpeng Fang1-1/+1
2024-03-08[AMDGPU] Replace `isInlinableLiteral16` with specific version (#84402)Shilei Tian1-3/+1
2024-03-06[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)David Green1-1/+1
2024-03-06Revert "[AMDGPU] Replace `isInlinableLiteral16` with specific version (#81345)"Shilei Tian1-1/+3
2024-03-04[AMDGPU] Replace `isInlinableLiteral16` with specific version (#81345)Shilei Tian1-3/+1
2024-03-01[AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (#83593)Jay Foad1-3/+0
2024-02-28AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (#82996)Petar Avramovic1-0/+2
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