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9 hoursAdd markers for 2.45 branchNick Clifton1-0/+4
31 hoursld/aarch64elf: add support for DT_AARCH64_MEMTAG_STACK dynamic tagIndu Bhagat1-0/+1
Add new command line option -z memtag-stack for aarch64 elf. This option instructs the linker to generate the necessary dynamic tag DT_AARCH64_MEMTAG_STACK, which the dynamic loader can then use to protect the stack memory with PROT_MTE. Linker issues an 'unrecognized option' error when -z memtag-stack is specified for non-aarch64 based emulations. readelf displays the dynamic tag when present: $ readelf -d <exectutable> Dynamic section at offset 0xfdd8 contains XX entries: Tag Type Name/Value 0x0000000000000001 (NEEDED) Shared library: [libc.so.6] 0x000000000000000c (INIT) 0x400520 0x000000000000000d (FINI) 0x400b64 0x0000000000000019 (INIT_ARRAY) 0x41fdc8 ... ... ... 0x000000007000000c (AARCH64_MEMTAG_STACK) 0x1 ... ... ... ChangeLog: * bfd/elfnn-aarch64.c (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_STACK dynamic tag. * bfd/elfxx-aarch64.h (struct aarch64_memtag_opts): Add new member for tracking whether stack access uses MTE insns. * binutils/readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_MEMTAG_STACK. * ld/emultempl/aarch64elf.em: Add new command line option. * ld/ld.texi: Add documentation for -z memtag-stack. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * ld/testsuite/ld-aarch64/dt-memtag-stack.d: New test. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_MEMTAG_STACK): New definition.
31 hoursld/aarch64elf: add support for DT_AARCH64_MEMTAG_MODE dynamic tagIndu Bhagat1-0/+1
Add new command line option -z memtag-mode=<mode> to aarch64 elf, where <mode> can be one of none, sync, or async. For mode of sync or async, a DT_AARCH64_MEMTAG_MODE dynamic tag with a value of 0 or 1 respectively is emitted. readelf displays the dynamic tag when present: $ readelf -d <exectutable> Dynamic section at offset 0xfdd8 contains XX entries: Tag Type Name/Value 0x0000000000000001 (NEEDED) Shared library: [libc.so.6] 0x000000000000000c (INIT) 0x400520 0x000000000000000d (FINI) 0x400b64 0x0000000000000019 (INIT_ARRAY) 0x41fdc8 ... ... ... 0x0000000070000009 (AARCH64_MEMTAG_MODE) 0x1 ... ... ... Note that this patch doesn't add support for the "asymm" MTE mode, which is an Armv8.7 extension. ChangeLog: * bfd/elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Add new member for memtag properties. (bfd_elfNN_aarch64_set_options): New argument to pass memtag properties. (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_MODE dynamic tag. * bfd/elfxx-aarch64.h: New definition for the various memtag properties. * binutils/readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_MEMTAG_MODE. * ld/emultempl/aarch64elf.em: Likewise. * ld/ld.texi: Add documentation for the new option -z memtag-mode. * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test. * ld/testsuite/ld-aarch64/dt-memtag.d: New test. * ld/testsuite/ld-aarch64/dt-memtag-mode.s: New test. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_MEMTAG_MODE): New definition.
32 hoursaarch64: Add support for --march=armv9.6-aAlice Carlotti1-0/+10
32 hoursaarch64: Refactor exclusion of reg names in immediatesAlice Carlotti1-1/+18
When parsing immediate values, register names should not be misinterpreted as symbols. However, for backwards compatibility we need to permit some newer register names within older instructions. The current mechanism for doing so depends on the list of explicit architecture requirements for the instructions, which is fragile and easy to forget, and grows increasingly messy as more architecture features are added. This patch add explicit flags to each opcode to indicate which set of register names is disallowed in each instance. These flags are mandatory for all opcodes with immediate operands, which ensures that the choice of disallowed names will always be deliberate and explicit. This patch should have no functional change.
33 hourslibsframe: bump version to 2.0Indu Bhagat1-8/+0
Remove LIBSFRAME_1.1, LIBSFRAME_1.0 nodes and add a new LIBSFRAME_2.0 node (non-inheritance version) to create new global versioned symbols. Also announce libsframe.so.2 in NEWS. New APIs: sframe_decoder_get_flags; sframe_decoder_get_offsetof_fde_start_addr; sframe_encoder_get_flags; sframe_encoder_get_offsetof_fde_start_addr; Removed APIs: (already deprecated since X-2 release) sframe_get_funcdesc_with_addr; APIs with changed semantics: sframe_decoder_get_funcdesc_v2; sframe_encoder_add_funcdesc_v2; sframe_encoder_write; lisbframe/ * libsframe.ver: Define new LIBSFRAME_2.0. * libtool-version: Bump the 'current' numeral to indicate a binary incompatible release. include/ * sframe-api.h (sframe_get_funcdesc_with_addr): Remove deprecated interface. libsframe/ * sframe.c (sframe_get_funcdesc_with_addr): Likewise. binutils/ * NEWS: Announce new versioned release of libsframe.
34 hoursgas: elf: binutils: add new section type SHT_GNU_SFRAMEIndu Bhagat1-0/+1
So far, SFrame sections were of type SHT_PROGBITS. As per ELF specification, SHT_PROGBITS indicates that the section holds information defined by the program, whose format and meaning are determined solely by the program. On the linker side, SHT_PROGBITS should be reserved for the simple "cat contents after applying relocs" semantics. Currently, the only way to know that a section contains SFrame stack trace data is if consumer checks for section name. Such a check for section name is not quite conformant to ELF principles. Some of this was discussed here https://sourceware.org/pipermail/binutils/2025-March/140181.html With this change, the SFrame sections generated by gas, ld will have section type set to SHT_GNU_SFRAME. The new section type is defined in the SHT_LOOS/SHT_HIOS space. The SFrame parsing routine _bfd_elf_parse_sframe () now admits sections only when the the section type is SHT_GNU_SFRAME. No special handling / validation is done at the moment for the case of manual creation of SFrame sections via obj_elf_section (). Add function level comments for now to add a note about this. Although the default handling for (sh_type >= SHT_LOOS && sh_type <= SHT_HIOS) is sufficient when SHT_GNU_SFRAME is in that range, it makes sense to add it as a case of its own. bfd/ * elf-sframe.c (_bfd_elf_parse_sframe): Check if section type is SHT_GNU_SFRAME. (_bfd_elf_set_section_sframe): Set SHT_GNU_SFRAME for output SFrame section. * elflink.c (obj_elf_section): Use section type for check instead of section name. * elfxx-x86.c: Set SHT_GNU_SFRAME for SFrame sections for .plt* sections. * elf.c (bfd_section_from_shdr): Add case for SHT_GNU_SFRAME. binutils/ * readelf.c (get_os_specific_section_type_name): Add SHT_GNU_SFRAME. gas/ * NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME set. * config/obj-elf.c (obj_elf_attach_to_group): Add comments to indicate no special handling for SFrame yet. * dw2gencfi.c (cfi_finish): Set SHT_GNU_SFRAME for emitted SFrame section. ld/ * NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME set. gas/testsuite/ * gas/cfi-sframe/cfi-sframe.exp: Add new test. * gas/cfi-sframe/cfi-sframe-common-1b.d: New test. * gas/cfi-sframe/cfi-sframe-common-1b.s: New test. include/ * elf/common.h (SHT_GNU_SFRAME): Add new section type for SFrame stack trace information. libsframe/doc/ * sframe-spec.texi: Add expected ELF section type.
2 daysaarch64: Support for FEAT_SVE_AES2Ezra Sitorus1-0/+9
FEAT_SVE_AES2 implements the SVE multi-vector Advanced Encryption Standard and 128-bit destination element polynomial multiply long instructions, when the PE is not in Streaming SVE mode.
2 daysaarch64: Support for FEAT_LSUIEzra Sitorus1-0/+2
FEAT_LSUI introduces unprivileged variants of load and store instructions so that clearing PSTATE.PAN is never required in privileged software.
2 daysaarch64: Support for FEAT_PCDPHINTEzra Sitorus1-0/+3
FEAT_PCDPHINT - Producer-consumer data placement hints - is an optional ISA extension that provides hint instructions to indicate: - a store in the current execution thread is generating data at a specific location, which a thread of execution on one or more other observers is waiting on. - the thread of execution on the current PE will read a location that may not yet have been written with the value to be consumed. This extension introduces: - STSHH, a hint instruction, with operands (policies) keep and strm - PRFM *IR*, a new prefetch memory operand.
2 dayss390: Store SFrame CFA offset adjusted and scaled downJens Remus1-3/+8
In SFrame V2 the size of the offsets following an SFrame FRE can be either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset determining their size: 1. CFA offset from CFA base register 2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved 3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved The FP and RA offsets from CFA, when FP/RA saved on the stack, usually have fixed values that fit into signed 8-bit SFrame offsets. Likewise the DWARF register numbers on s390x of general registers (GR; 0-15) and floating-point registers (FPR; 16-31), when FP/RA saved in registers. With that the CFA offset from CFA base register has the greatest impact on the signed SFrame offset size. The s390x ELF ABI defines the stack pointer (SP) to be 8-byte aligned [1] and the CFA as SP at call site + 160 [2]. The CFA offset from CFA base register is therefore always a multiple of 8. On s390x store the SFrame CFA offset from CFA base register scaled down by the s390x-specific CFA alignment factor of 8, in addition to the adjustment by the s390x-specific CFA adjustment of -160, to further improve the use of signed 8-bit SFrame offsets. This is similar to the DWARF data alignment factor getting factored out from certain offsets stored in DWARF CFI. [1]: s390x ELF ABI, sections "Register Roles" and "Stack Frame Allocation", https://github.com/IBM/s390x-abi/releases [2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"), https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88 include/ * sframe.h (SFRAME_S390X_CFA_OFFSET_ALIGNMENT_FACTOR): Define s390x-specific CFA offset alignment factor. (SFRAME_V2_S390X_CFA_OFFSET_ENCODE, SFRAME_V2_S390X_CFA_OFFSET_DECODE): Scale down/up by SFRAME_S390X_CFA_OFFSET_ALIGNMENT_FACTOR. libsframe/ * doc/sframe-spec.texi (s390x, SFRAME_S390X_CFA_OFFSET_ALIGNMENT_FACTOR): Document s390x- specific CFA offset alignment factor. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2 dayss390: Store SFrame CFA offset adjustedJens Remus1-0/+8
In SFrame V2 the size of the offsets following an SFrame FRE can be either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset determining their size: 1. CFA offset from CFA base register 2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved 3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved The FP and RA offsets from CFA, when FP/RA saved on the stack, usually have fixed values that fit into signed 8-bit SFrame offsets. Likewise the DWARF register numbers on s390x of general registers (GR; 0-15) and floating-point registers (FPR; 16-31), when FP/RA saved in registers. With that the CFA offset from CFA base register has the greatest impact on the signed SFrame offset size. The s390x ELF ABI [1] defines the CFA as stack pointer (SP) at call site +160. [2] Therefore the minimum CFA offset from CFA base register on s390x is 160. This does not fit into a signed 8-bit integer and therefore effectively prevents any use of signed 8-bit SFrame offsets on s390x. For s390x store the CFA offset from CFA base register adjusted by -160 to enable the use of signed 8-bit SFrame offsets. [1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases [2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"), https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88 include/ * sframe.h (SFRAME_S390X_CFA_OFFSET_ADJUSTMENT): Define s390x-specific CFA offset adjustment. (SFRAME_V2_S390X_CFA_OFFSET_ENCODE, SFRAME_V2_S390X_CFA_OFFSET_DECODE): New s390x-specific macros. Use SFRAME_S390X_CFA_OFFSET_ADJUSTMENT to en-/decode CFA offset. bfd/ * elf64-s390.c (elf_s390x_sframe_plt_fre): Use SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it adjusted and switch to 8-bit offsets. gas/ * gen-sframe.c (sframe_fre_set_cfa_offset): For s390x use SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it adjusted. (sframe_fre_get_cfa_offset): New helper. For s390x use SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its adjustment. (sframe_xlate_do_def_cfa_register): Use new helper sframe_fre_get_cfa_offset. libsframe/ * sframe.c (sframe_fre_get_cfa_offset): For s390x use SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its adjustment. * doc/sframe-spec.texi (s390x, SFRAME_S390X_CFA_OFFSET_ADJUSTMENT, SFRAME_V2_S390X_CFA_OFFSET_ENCODE, SFRAME_V2_S390X_CFA_OFFSET_DECODE): Document s390x-specific adjustment of CFA offset. libsframe/testsuite/ * libsframe.find/plt-findfre-2.c (add_plt0_fde, add_pltn_fde): Use SFRAME_V2_S390X_CFA_OFFSET_ENCODE to enable use of 1-byte SFrame offsets. Suggested-by: Indu Bhagat <indu.bhagat@oracle.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2 dayss390: Represent FP without RA saved in SFrameJens Remus2-0/+24
If an architecture uses both SFrame RA and FP tracking SFrame assumes that the RA offset is the 2nd offset and the FP offset is the 3rd offset following a SFrame FRE. An architecture does not necessarily need to save both on the stack (or in register) at the same time or even at all. SFrame cannot represent FP without RA saved on stack (or in a register), since it cannot distinguish whether the 2nd offset is the RA or FP offset. For s390x use an invalid SFrame RA offset from CFA value of zero as padding to represent the FP being saved when the RA is not saved. This aligns with the existing invalid SFrame fixed RA offset from CFA value of zero. In a stack tracer this then also naturally falls into place, as it can skip restoring the RA in the topmost frame, if both the fixed RA offset (from SFrame header) and the RA offset (from FDE) are zero, without any need to test architecture-specific flags. include/ * sframe.h (SFRAME_FRE_RA_OFFSET_INVALID): New define. Used as padding offset. * sframe-api.h (sframe_fre_get_ra_offset): Add comment that for s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates that the RA is not saved. gas/ * gen-sframe.c (get_fre_num_offsets): For s390x account padding RA offset, if FP without RA saved. (sframe_get_fre_offset_size): Likewise. (output_sframe_row_entry): For s390x write a padding RA offset, if FP without RA needs to be represented. (sframe_do_fde): Enable FP without RA saved to be represented on s390x. libsframe/ * sframe.c (sframe_fre_get_ra_offset): Add comment that for s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates that the RA is not saved. * sframe-dump.c (dump_sframe_func_with_fres): Treat invalid RA offsets as if they were undefined. Display them as "U" to distinguish them. * doc/sframe-spec.texi (s390x): Document s390x-specific use of SFRAME_FRE_RA_OFFSET_INVALID to represent FP without RA saved. gas/testsuite/ * gas/cfi-sframe/cfi-sframe.exp: Rename s390x-specific tests. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Rename to ... * cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-2.s: This. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-2.d: Likewise. Update test verification pattern accordingly. * cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s: Rename to ... * cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-2.s: This. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-2.d: Likewise. Update test verification pattern accordingly. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2 dayss390: Represent FP/RA saved in register in SFrameJens Remus2-2/+21
GCC on s390x, when in a leaf function, can be observed to save the frame pointer (FP) and/or return address (RA) register in a floating- point registers (FPR) instead of on the stack. This is declared using the following CFI directive: .cfi_register <fp/ra-regnum>, <fpr-regnum> SFrame cannot represent the FP and/or RA being saved in another register. It does only track the CFA base register (SP/FP), CFA offset from CFA base register, and FP and RA save area offsets from CFA. On s390x the FP and/or RA are only saved in another FPR when in a leaf function. That is a function that does not call any other function. Therefore it can ever only be the topmost function in a call chain. An unwinder by default has access to all registers of the function that is the topmost on the call stack. Therefore no further information is required to restore FP/RA from the FPR. Represent FP/RA saved in another register on s390x, by encoding the DWARF register number shifted by one to the left with the least- significant bit set in the offset as follows: offset = (regnum << 1) | 1 The use of the least-significant bit of the offset as indication is possible, as the stack pointer (SP), the CFA, and any register save area slots are 8-byte aligned according to the s390x ELF ABI: - The stack pointer (SP) "shall maintain an 8-byte alignment". [1] - The CFA is defined as SP at call site +160. [2] - Pointers and 8-byte integers, such as general register values, must be 8-byte aligned. [3] SFrame FP and RA stack offsets must therefore always be a multiple of 8 on s390x. Note that for the same reason the DWARF data alignment factor is -8 on s390x (see DWARF2_CIE_DATA_ALIGNMENT). Add s390x-specific SFrame (error) tests for FP/RA saved in FPRs in leaf function. [1]: s390x ELF ABI, sections "Register Roles" and "Stack Frame Allocation", https://github.com/IBM/s390x-abi/releases [2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"), https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88 [3]: s390x ELF ABI, section "Fundamental Types", table "Scalar types", https://github.com/IBM/s390x-abi/releases include/ * sframe.h (SFRAME_V2_S390X_OFFSET_IS_REGNUM): New s390x- specific macro to test whether an SFrame FP/RA offset is a DWARF register number. (SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM): New s390x-specific macro to encode a DWARF register number into an SFrame FP/RA offset. (SFRAME_V2_S390X_OFFSET_DECODE_REGNUM): New s390x-specific macro to decode an SFrame FP/RA offset into a DWARF register number. * sframe-api.h (sframe_fre_get_fp_offset, sframe_fre_get_fp_offset): Add comment that for s390x the offset may be an encoded register number. gas/ * gen-sframe.c (s390_sframe_xlate_do_register): New S390- specific function. Uses SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM to represent FP/RA saved in another register on s390x. (sframe_xlate_do_register): Invoke s390_sframe_xlate_do_register on s390x. libsframe/ * sframe.c (sframe_fre_get_fp_offset, sframe_fre_get_fp_offset): Add comment that for s390x the offset may be an encoded register number. * sframe-dump.c (is_sframe_abi_arch_s390x): New helper to test whether ABI/arch is s390x. (dump_sframe_func_with_fres): Use SFRAME_V2_S390X_OFFSET_IS_REGNUM and SFRAME_V2_S390X_OFFSET_DECODE_REGNUM to dump FP/RA saved in another register on s390x. * doc/sframe-spec.texi (s390x): Document s390x-specific representation of FP/RA saved in another register. gas/testsuite/ * gas/cfi-sframe/cfi-sframe.exp: Update s390x-specific SFrame (error) tests. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s: Rename to ... * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.s: This. Test no longer triggers a warning, as SFrame can represent FP and RA saved in registers. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Test now triggers a different warning, as SFrame can represent FP and RA saved in registers, but not FP without RA saved in register. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2 dayss390: Initial support to generate .sframe from CFI directives in assemblerJens Remus1-3/+8
This introduces initial support to generate .sframe from CFI directives in assembler on s390 64-bit (s390x). Due to SFrame V2 format limitations it has the following limitations, some of them getting addressed by subsequent patches, which cause generation of SFrame FDE to be skipped: - SFrame FP/RA tracking only supports register contents being saved on the stack (i.e. .cfi_offset). It does not support FP/RA register contents being saved in other registers (i.e. .cfi_register). GCC on s390x can be observed to save the FP/RA register contents in floating- point registers, but only in leaf functions. This issue is detailed further and resolved in the subsequent commit "s390: Represent FP/RA saved in register in SFrame". - SFrame FP/RA tracking cannot represent FP without RA saved. This is because the format assumes SFrame FDE offset2 to be the RA offset, if there are two offsets, and offset3 to be the FP offset, if there are three offsets. There is no mean to distinguish whether offset2 is the RA or FP offset, if there are only two offsets. This issue is detailed further and resolved in the subsequent commit "s390: Represent FP without RA saved in SFrame". - SFrame assumes a dedicated FP register number. The s390x ELF ABI [1] does only designate register 11 as preferred FP register number. In general GCC and Clang on s390x use register 11 as frame pointer. GCC on s390x can be observed to use register 14 as frame pointer in the stack clash protector in the function prologue. glibc on s390x contains hand-written assembler code that uses register 12 as frame pointer. This s390x support is largely based on the AArch64 support from commit b52c4ee46657 ("gas: generate .sframe from CFI directives"). The SFrame ABI/arch identifier SFRAME_ABI_S390X_ENDIAN_BIG is introduced for s390x and added to the SFrame format specification. The s390x ELF ABI [1] specifies the following C calling conventions for s390x architecture: - Register 15 is the stack pointer (SP). - Register 14 contains the return address (RA) at function entry. - There is no dedicated frame pointer register. Register 11 is the preferred frame pointer (FP). [2] GCC and Clang in general use register 11 as frame pointer. - The CFA is defined as SP at call site +160. [3] The SP at call site can therefore be derived from the CFA using a SP value offset from CFA of -160. The s390x ELF ABI [1] does not assign any standard save slot to each register in the register save area of a stack frame. Neither the return address (RA, r14) nor preferred frame pointer (FP, r11) necessarily need to be saved. Therefore SFrame RA and FP tracking is used. Support for SFrame on s390 is only enabled for the 64-bit s390x ELF ABI (z/Architecture with 64-bit addressing mode). It is disabled for the 32-bit s390 ELF ABI (ESA/390 or z/Architecture with 32-bit addressing mode). s390x-specific SFrame assembler and linker tests are added, including error tests for use of a non-preferred frame pointer (FP) register and specification of a non-default return address (RA) register. [1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases [2]: s390x ELF ABI, commit f00421825979 ("Add information about the frame pointer register"), https://github.com/IBM/s390x-abi/commit/f00421825979 [3]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"), https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88 include/ * sframe.h: Add reference to s390x architecture in comments. (SFRAME_ABI_S390X_ENDIAN_BIG): Define SFrame ABI/arch identifier for s390x. (SFRAME_S390X_SP_VAL_OFFSET): Define s390x-specific SP value offset from CFA. libsframe/ * sframe.c (need_swapping): Add SFRAME_ABI_S390X_ENDIAN_BIG. * doc/sframe-spec.texi (SFRAME_ABI_S390X_ENDIAN_BIG, s390x, SFRAME_S390X_SP_VAL_OFFSET): Document SFrame ABI/arch identifier for s390x, add references to s390x architecture, and document s390x-specifics, such as the SP value offset from CFA of -160. gas/ * config/tc-s390.h: s390x support to generate .sframe from CFI directives in assembler. (support_sframe_p): Define. (SFRAME_CFA_SP_REG, SFRAME_CFA_FP_REG, SFRAME_CFA_RA_REG): Define. (sframe_ra_tracking_p): Define. (sframe_cfa_ra_offset): Define. (sframe_get_abi_arch): Define. * config/tc-s390.c: s390x support to generate .sframe from CFI directives in assembler. (s390_sframe_cfa_sp_reg, s390_sframe_cfa_fp_reg, s390_sframe_cfa_ra_reg): New. Initialize to DWARF register numbers of stack pointer (SP, r15), preferred frame pointer (FP, r11), and return address (RA, r14) registers. (s390_support_sframe_p): New function. Return true if s390x. (s390_sframe_ra_tracking_p): New function. Return true. (s390_sframe_cfa_ra_offset): New function. Return SFRAME_CFA_FIXED_RA_INVALID. (s390_sframe_get_abi_arch): New function. Return SFRAME_ABI_S390X_ENDIAN_BIG if s390x, otherwise zero. * gen-sframe.c: Add reference to s390x architecture in comments. (sframe_xlate_do_val_offset): Add support for s390x-specific SFRAME_S390X_SP_VAL_OFFSET. * NEWS: Add news entry. gas/testsuite/ * gas/cfi-sframe/cfi-sframe.exp: Enable common SFrame tests for s390x. Add s390x-specific SFrame (error) tests. * gas/cfi-sframe/cfi-sframe-s390x-1.d: New s390x-specific SFrame test. * gas/cfi-sframe/cfi-sframe-s390x-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-2.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-1.d: New s390x-specific SFrame error test that uses a non-default frame-pointer register as CFA base register. * gas/cfi-sframe/cfi-sframe-s390x-err-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-2.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-3.d: New s390x-specific SFrame error test that uses a non-default return address register. * gas/cfi-sframe/cfi-sframe-s390x-err-3.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.d: New s390x- specific SFrame test that saves RA and FP individually on the stack. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: New s390x-specific SFrame error test that saves FP and RA individually, to trigger FP without RA saved. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: New s390x-specific SFrame error test that saves FP and RA individually in registers. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d: New s390x-specific SFrame error test that saves RA and FP individually in registers. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s: Likewise. ld/testsuite/ * ld-s390/s390.exp: Add simple SFrame test. * ld-s390/sframe-simple-1.d: New simple SFrame test. * ld-s390/sframe-bar.s: Likewise. * ld-s390/sframe-foo.s: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
3 dayslibiberty: sync with gccMatthieu Longo1-0/+447
Import the following commits from GCC as of r16-2170-g2f2e9bcfb0fd9c: 0fd98b6f9f2 libiberty: add routines to handle type-sensitive doubly linked lists
3 daysRISC-V: Clarify the imply rule of cNelson Chu1-4/+4
This also fix the imply result for .option rvc. Imply zcf when c and f and rv32 Imply zcd when c and d Imply zca when c Changed INSN_CLASS_C to INSN_CLASS_ZCA Changed INSN_CLASS_F_AND_C to INSN_CLASS_ZCF Changed INSN_CLASS_D_AND_C to INSN_CLASS_ZCD Changed INSN_CLASS_ZIHINTNTL_AND_C to INSN_CLASS_ZIHINTNTL_AND_ZCA
4 daysgas: ld: sframe: add new internal headerIndu Bhagat2-5/+30
for SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS. The intention of creating an abstraction like SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS is to address the concern that there should be a central place to enforce harmonious flags between GNU as and ld. At the moment, the only flag that needs to be enforced is SFRAME_F_FDE_FUNC_START_PCREL. sframe.h and sframe-api.h are installed headers by libsframe for the specification and implementation respectively. Adding a definition like SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS does not fit in either. Create a new internal header instead to keep the definition uncoupled from sframe.h and sframe-api.h. Rename the previously added SFRAME_F_LD_MUSTHAVE_FLAGS to define the new SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS. bfd/ * elf-sframe.c (_bfd_elf_merge_section_sframe): Use the new internal header and SFRAME_V2_GNU_AS_LD_ENCODING_FLAGS. gas/ * gen-sframe.c (output_sframe_internal): Likewise. include/ * sframe-api.h (SFRAME_F_LD_MUSTHAVE_FLAGS): Move from.. * sframe-internal.h: ..to here. New file.
5 daysgas d30v_insn plus other non-const pointersAlan Modra1-2/+2
d30v has a bunch of casts that are only needed due to various types missing a const. Fix that.
5 daysaarch64: Add support for FEAT_SVE2p2 and FEAT_SME2p2Alice Carlotti1-1/+12
7 daysbfd: gas: ld: libsframe: adopt new encoding for FDE func start addr fieldIndu Bhagat1-0/+5
This patch convenes a set of changes in bfd, gas, ld, libsframe towards moving to the new encoding for the 'sfde_func_start_address' field in SFrame FDE. First, gas must now mark all SFrame sections with the new flag SFRAME_F_FDE_FUNC_START_PCREL. gas was already emitting the field in the said encoding. * gas/gen-sframe.c (output_sframe_internal): Emit the flag SFRAME_F_FDE_FUNC_START_PCREL. Similarly for ld, adopt the new semantics of sfde_func_start_address consistently. This means: - When merging SFrame sections, check that all input SFrame sections have the SFRAME_F_FDE_FUNC_START_PCREL flag set. If the check fails, ld errors out. - When merging SFrame sections, keep even the in-memory contents of the FDE function start address (buffer passed to libsframe sframe_encoder_write () for writing out) encoded in the new semantics. While it is, in theory, possible that instead of doing this change here, we adjust the value of sfde_func_start_address at the final write (sframe_encoder_write) time. But latter is not favorable for maintenanance and may be generally confusing for developers. - When creating SFrame for PLT entries, emit flag SFRAME_F_FDE_FUNC_START_PCREL. include/ * sframe-api.h (SFRAME_F_LD_MUSTHAVE_FLAGS): New definition. bfd/ * elf-sframe.c (_bfd_elf_merge_section_sframe): Check for flag combinatation SFRAME_F_LD_MUSTHAVE_FLAGS set for all input and output SFrame sections. If not, error out. Also, adopt the new semantics of function start address encoding. * bfd/elfxx-x86.c (_bfd_x86_elf_create_sframe_plt): Emit flag SFRAME_F_FDE_FUNC_START_PCREL. Next, for dumping SFrame sections, now that we are emitting the same encoding in GAS, non-relocatable and relocatable SFrame links, it is the time to set relocate to TRUE in debug_displays[]. binutils/ * dwarf.c (struct dwarf_section_display): Allow sframe sections to now be relocated. gas/testsuite/ * gas/cfi-sframe/cfi-sframe-aarch64-pac-ab-key-1.d: Update the test. Relocatable SFrame sections now display non-zero value (appropriate function start address). Now, as the SFrame sections on-disk and in-memory use the new semantics of sfde_func_start_address encoding (i.e., function start address is the offset from the sfde_func_start_address field to the start PC), the calculation to make it human readable (i.e., relatable to the addresses in .text sections) needs adjustment. libsframe/ * sframe-dump.c (dump_sframe_func_with_fres): Adjust the function start address for dumping. Now that both the emission of the new encoding, and the relocation of sections before dumping them is in place, it is time to adjust the testcases. gas/testsuite/ * gas/cfi-sframe/cfi-sframe-aarch64-1.d: Update expected output to include SFRAME_F_FDE_FUNC_START_PCREL instead of NONE. * gas/cfi-sframe/cfi-sframe-aarch64-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-aarch64-3.d: Likewise. * gas/cfi-sframe/cfi-sframe-aarch64-4.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-10.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-11.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-3.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-4.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-5.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-6.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-7.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-8.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-9.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-3.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-4.d: Likewise. * gas/cfi-sframe/common-empty-1.d: Likewise. * gas/cfi-sframe/common-empty-2.d: Likewise. * gas/cfi-sframe/common-empty-3.d: Likewise. * gas/scfi/x86_64/scfi-cfi-sections-1.d: Likewise. * gas/scfi/x86_64/scfi-dyn-stack-1.d: Likewise. ld/testsuite/ * ld-aarch64/sframe-simple-1.d: Update expected output to include SFRAME_F_FDE_FUNC_START_PCREL. * ld-x86-64/sframe-ibt-plt-1.d: Likewise. * ld-x86-64/sframe-plt-1.d: Likewise. * ld-x86-64/sframe-pltgot-1.d: Likewise. * ld-x86-64/sframe-pltgot-2.d: Likewise. * ld-x86-64/sframe-simple-1.d: Likewise. Naturally, the change of semantics for 'SFrame FDE function start address' has consequences on the implementation in libsframe. As per the new semantics: - Function start address in the SFrame FDE (sfde_func_start_address) is an offset from the FDE function start address field to the start PC of the associated function. Note that, the libsframe library brings the SFrame section contents into its own memory to create a sframe_decoder_ctx object via sframe_decode (). Many internal and user-interfacing APIs then may use sframe_decoder_ctx object to interact and fulfill the work. In context of changing semantics for sfde_func_start_address, following relevant examples may help understand the impact: - sframe_find_fre () finds a the SFrame stack trace data (SFrame FRE) given a lookup offset (offset of lookup_pc from the start of SFrame section). Now that the sfde_func_start_address includes the distance from the sfde_func_start_address field to the start of SFrame section itself, the comparison checks of sfde_func_start_address with the incoming lookup offset need adjustment. - Some internal functions (sframe_get_funcdesc_with_addr_internal () finds SFrame FDE by using binary seach comparing sfde_func_start_address fields, etc.) need adjustments. - sframe_encoder_write () sorts the SFrame FDEs before writing out the SFrame data. Sorting of SFrame FDE via the internal function sframe_sort_funcdesc() needs adjustments: the new encoding of sfde_func_start_address means the distances are not from the same anchor, so cannot be sorted directly. This patch takes the approach of adding a new internal function: - sframe_decoder_get_secrel_func_start_addr (): This function returns the offset of the start PC of the function from the start of SFrame section, i.e., it gives a section-relative offset. As the sframe_decoder_get_secrel_func_start_addr () API needs the value of the function index in the FDE list, another internal API needs sframe_fre_check_range_p () adjustments too. Sorting the FDEs (via sframe_sort_funcdesc ()) is done by first bringing all offsets in sfde_func_start_address relative to start of SFrame section, followed by sorting, and then readjusting the offsets accroding to the new position in the FDE list. libsframe/ * sframe.c (sframe_decoder_get_secrel_func_start_addr): New static function. (sframe_fre_check_range_p): Adjust the interface a bit. (sframe_get_funcdesc_with_addr_internal): Use sframe_decoder_get_secrel_func_start_addr () when comparing sfde_func_start_address with user input offset. (sframe_find_fre): Adopt the new semantics. (sframe_sort_funcdesc): Likewise. For the libsframe testsuite, use the new encoding for FDE func start addr: distance between the FDE sfde_func_start_address field and the start PC of the function itself. Use SFRAME_F_FDE_FUNC_START_PCREL flag, though the sframe_encode () interface in libsframe applies no sanity checks for the encoding itself. libsframe/testsuite/ * libsframe.find/findfre-1.c: Adjust to use the new SFRAME_F_FDE_FUNC_START_PCREL specific encoding. * libsframe.find/findfunc-1.c: Likewise. * libsframe.find/plt-findfre-1.c: Likewise. * libsframe/testsuite/libsframe.decode/DATA2: Update data file due to usage of new SFRAME_F_FDE_FUNC_START_PCREL flag. * libsframe/testsuite/libsframe.encode/encode-1.c: Use flag SFRAME_F_FDE_FUNC_START_PCREL.
7 daysinclude: sframe: doc: define new flag SFRAME_F_FDE_FUNC_START_PCRELIndu Bhagat1-2/+13
Add a new flag SFRAME_F_FDE_FUNC_START_PCREL to SFrame stack trace format. If set, this flag indicates that the function start address field (sfde_func_start_address) is the offset to the function start address from the SFrame FDE function start address field itself. Such an encoding is friendlier to the exisitng PC-REL relocations available in the ABIs supported in SFrame: AMD64 (R_X86_64_PC32) and AArch64 (R_AARCH64_PREL32). In subsequent patches, we will make the implementation in gas and ld to both: - emit the values in the same (above-mentioned) encoding uniformly. - set the flag SFRAME_F_FDE_FUNC_START_PCREL in the SFrame header for consumers to be able to distinguish. Define SFRAME_V2_F_ALL_FLAGS in sframe.h to help keep the implementation less error-prone by keeping a set of all defined flags at a central place. Adjust the check in sframe_header_sanity_check_p () to use the SFRAME_V2_F_ALL_FLAGS instead. Add documentation for SFRAME_F_FDE_FUNC_START_PCREL. Update the documentation about the encoding of the sfde_func_start_address field. Also, update the section "Changes from Version 1 to Version 2" to include the specification of the new flag SFRAME_F_FDE_FUNC_START_PCREL as an erratum to the SFrame Version 2 specification. include/ * sframe.h (SFRAME_F_FDE_FUNC_START_PCREL): New definition. (SFRAME_V2_F_ALL_FLAGS): Likewise. libsframe/ * sframe-dump.c (dump_sframe_header_flags): Update to include the new flag SFRAME_F_FDE_FUNC_START_PCREL. * sframe.c (sframe_header_sanity_check_p): Use SFRAME_V2_F_ALL_FLAGS. libsframe/doc/ * sframe-spec.texi: Add details about the new flag. Also update the defails about the sfde_func_start_address encoding.
7 daysinclude: libsframe: add APIs for offsetof FDE func start addr fieldIndu Bhagat1-0/+24
These APIs will be later used by the linker to arrange SFrame FDEs in the output SFrame section. include/ * sframe-api.h (sframe_decoder_get_offsetof_fde_start_addr): New declaration. (sframe_encoder_get_offsetof_fde_start_addr): Likewise. libsframe/ * libsframe.ver: List the new APIs. * sframe.c (sframe_decoder_get_offsetof_fde_start_addr): New definition. (sframe_encoder_get_offsetof_fde_start_addr): Likewise.
7 daysinclude: libsframe: add APIs for SFrame header flagsIndu Bhagat1-0/+8
Add new APIs, one each for getting flags from the SFrame decoder and SFrame encoder context objects respectively. These will later be used by the linker to uniformly access the flags, given the SFrame decoder and SFrame encoder objects. Use the new API, where applicable, within libsframe. include/ * sframe-api.h (sframe_decoder_get_flags): New declaration. (sframe_encoder_get_flags): Likewise. libsframe/ * libsframe.ver: List new APIs. * sframe.c (sframe_decoder_get_flags): New definition. (sframe_encoder_get_flags): Likewise. (sframe_get_funcdesc_with_addr_internal): Use the new API. (sframe_encoder_get_flags): Likewise. (sframe_encoder_write_sframe): Likewise.
10 daysbfd/aarch64-linux: Support reading and writing the GCS core file noteThiago Jung Bauermann1-0/+3
Reviewed-By: Luis Machado <luis.machado@arm.com>
2025-06-25aarch64: Add supports for FEAT_PoPS feature and DC instructions.Srinath Parvathaneni1-0/+2
This patch add support for FEAT_PoPS feature which can be enabled through +pops command line flag. This patch also adds support for following DC instructions and the spec can be found here [1]. 1. "dc cigdvaps" enabled on passing +memtag+pops command line flags. 2. "dc civaps" enabled on passing +pops command line flag. [1]: https://developer.arm.com/documentation/ddi0601/2025-03/AArch64-Instructions?lang=en
2025-06-24RISC-V: Support for unlabeled landing pad PLT generationKito Cheng1-0/+1
This patch adds support for generating unlabeled landing pad PLT entries for the RISC-V architecture. Unlabeled landing pad will place a LPAD instruction at the PLT entry and PLT header, also PLT header will have few changes due to the offset is different from the original one. Ref: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417
2025-06-24RISC-V: Add GNU_PROPERTY_RISCV_FEATURE_1_CFI_SS and ↵Kito Cheng1-0/+5
GNU_PROPERTY_RISCV_FEATURE_1_CFI_LP_UNLABELED This patch adds two new GNU properties for RISC-V: GNU_PROPERTY_RISCV_FEATURE_1_CFI_SS and GNU_PROPERTY_RISCV_FEATURE_1_CFI_LP_UNLABELED. We only add readelf and define the properties in this patch. Ref: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417
2025-06-19aarch64: Support for FEAT_LSFEEzra Sitorus1-2/+7
FEAT_LSFE - Large System Float Extension - implements A64 base atomic floating-point in-memory instructions.
2025-06-19aarch64: Support for FEAT_SVE_F16F32MM, FEAT_F8F16M, FEAT_F8F32MMEzra Sitorus1-0/+6
FEAT_SVE_F16F32MM introduces the SVE half-precision floating-point matrix multiply-accumulate to single-precision instruction. FEAT_F8F32MM introduces the Advanced SIMD 8-bit floating-point matrix multiply-accumulate to single-precision instruction. FEAT_F8F16MM introduces the Advanced SIMD 8-bit floating-point matrix multiply-accumulate to half-precision instruction.
2025-06-19aarch64: Support for FEAT_CMPBREzra Sitorus1-0/+5
FEAT_CMPBR - Compare and branch instructions. This patch adds these instructions: - CB<CC> (register) - CB<CC> (immediate) - CBH<CC> - CBB<CC> where CC is one of the following: - EQ - NE - GT - GE - LT - LE - HI - HS - LO - LS
2025-06-19aarch64: Add occmo flag for FEAT_OCCMOEzra Sitorus1-0/+2
FEAT_OCCMO support was introduced, but the feature flags were missing. This patch adds these flags, as well as splitting up the tests to test occmo vs occmo+memtag operands.
2025-06-19aarch64: Support for FEAT_SVE_BFSCALEEzra Sitorus1-0/+5
FEAT_SVE_BFSCALE introduces the SVE BFSCALE instruction, when the PE is not in Streaming SVE mode. If FEAT_SME2 is implemented, FEAT_SVE_BFSCALE also introduces SME multi-vector Z-targeting BFloat16 scaling instructions, BFSCALE and BFMUL.
2025-06-12aarch64: Add support for FEAT_FPRCVTRichard Ball1-0/+4
FEAT_FPRCVT introduces new versions of previous instructions. The instructions are used to convert between floating points and Integers. These new versions take as operands SIMD&FP registers for both the source and destination register. FEAT_FPRCVT also enables the use of some existing AdvSIMD instructions in streaming mode. However, no changes are needed in gas to support this.
2025-06-11aarch64: Add definitions for missing architecture bitsYury Khrustalev1-4/+16
Complete macros for feature bits for v9.1-A, v9.2-A, v9.3-A, and v9.4-A.
2025-06-11kvx gcc-4.5 build fixesAlan Modra1-2/+2
More missing struct initialisers, for expressionS vars that in this case don't need to be initialised. Also an error: redefinition of typedef 'symbolS'. OK, so don't use a typedef.
2025-06-09aarch64: Increase the number of feature words to 3Richard Earnshaw1-1/+2
Now that most of the effort of updating the number of feature words is handled by macros, add an additional one, taking the number of supported features to 192.
2025-06-09aarch64: use macro trickery to automate feature array size replicationRichard Earnshaw1-36/+87
There are quite a few macros that need to be changed when we need to increase the number of words in the features data structure. With some macro trickery we can automate most of this so that a single macro needs to be updated. With C2X we could probably do even better by using recursion, but this is still a much better situation than we had previously. A static assertion is used to ensure that there is always enough space in the flags macro for the number of feature bits we need to support.
2025-06-09aarch64: Fix typos in opcode headersYury Khrustalev1-4/+4
2025-05-22RISC-V: Add support for Smcdeleg and Ssccfg extensions.Jiawei1-0/+4
This patch rebases the original patch from Nelson's implement[1]. Added new extension Smcdeleg and Ssccfg with a new CSR, scountinhibit.[2] Co-Authored-By: Nelson Chu <nelson@rivosinc.com> Co-Authored-By: Jiawei Chen <jiawei@iscas.ac.cn> [1] https://patchwork.sourceware.org/project/binutils/patch/20240620045359.47513-1-nelson@rivosinc.com/ [2] https://github.com/riscvarchive/riscv-smcdeleg-ssccfg/releases/tag/v1.0.0 bfd/ChangeLog: * elfxx-riscv.c: New extensions. gas/ChangeLog: * NEWS: Mention new extensions. * config/tc-riscv.c (enum riscv_csr_class): New CSR class. (riscv_csr_address): Add support for Ssccfg. * testsuite/gas/riscv/csr-version-1p10.d: New test for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p10.l: New warning for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p11.d: New test for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p11.l: New warning for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p12.d: New test for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p12.l: New warning for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p13.d: New test for Ssccfg CSR. * testsuite/gas/riscv/csr-version-1p13.l: New warning for Ssccfg CSR. * testsuite/gas/riscv/csr.s: New Ssccfg CSR. * testsuite/gas/riscv/imply.d: New imply check. * testsuite/gas/riscv/imply.s: New implies. * testsuite/gas/riscv/march-help.l: New helping info. include/ChangeLog: * opcode/riscv-opc.h (CSR_SCOUNTINHIBIT): New CSR address. (DECLARE_CSR): Add Ssccfg CSR.
2025-05-20libiberty: sync with gccAndreas Schwab1-0/+22
Import the following commits from GCC as of r16-614-g9d039eff453f77: 31dd621796f libiberty: add ldirname function f3d07779fdb libiberty: Append <libgen.h> to AC_CHECK_DECLS [PR119218]. 90183362524 libiberty, gcc: Add memrchr to libiberty and use it [PR119283]. 43717ee9064 libiberty: Fix off-by-one when collecting range expression
2025-05-16RISC-V: Add zilsd & zclsd supportdysun1-0/+2
Ref: https://github.com/riscv/riscv-zilsd/blob/main/zilsd.adoc Signed-off-by: dysun <sundongya@nucleisys.com> Co-developed-by: LIU Xu <liuxu@nucleisys.com> Co-developed-by: ZHAO Fujin <zhaofujin@nucleisys.com>
2025-05-09aarch64: Eliminate AARCH64_OPND_SVE_ADDR_RAlice Carlotti1-6/+10
Adjust parsing for AARCH64_OPND_SVE_ADDR_RR{_LSL*} operands to accept implicit XZR offsets. Add new AARCH64_OPND_SVE_ADDR_RM{_LSL*} operands to support instructions where an XZR offset is allowed but must be specified explicitly. This allows the removal of the duplicate opcode table entries using AARCH64_OPND_SVE_ADDR_R.
2025-05-09RISC-V: Add Privileged Architecture 1.13 CSRs.Jiawei1-0/+4
This patch support RISC-V Privileged Architecture 1.13 CSRs 'medelegh' and 'hedelegh'. More details between 1.12 and 1.13 see [1]. [1] https://github.com/riscv/riscv-isa-manual/blob/main/src/priv-preface.adoc Version log: Remove gas/po changes. bfd/ChangeLog: * cpu-riscv.c: New option. * cpu-riscv.h (enum riscv_spec_class): Ditto. binutils/ChangeLog: * doc/binutils.texi: New option. gas/ChangeLog: * NEWS: Add priv-1.13 support. * config/tc-riscv.c: New option. * configure: Ditto. * configure.ac: Ditto. * testsuite/gas/riscv/csr-version-1p10.d: New CSR. * testsuite/gas/riscv/csr-version-1p10.l: New warning. * testsuite/gas/riscv/csr-version-1p11.d: New CSR. * testsuite/gas/riscv/csr-version-1p11.l: New warning. * testsuite/gas/riscv/csr-version-1p12.d: New CSR. * testsuite/gas/riscv/csr-version-1p12.l: New warning. * testsuite/gas/riscv/csr.s: New CSR. * testsuite/gas/riscv/attribute-15.d: New test. * testsuite/gas/riscv/attribute-16.d: New test. * testsuite/gas/riscv/csr-version-1p13.d: New test. * testsuite/gas/riscv/csr-version-1p13.l: New test. include/ChangeLog: * opcode/riscv-opc.h (CSR_MEDELEGH): New CSR. (CSR_HEDELEGH): Ditto. (DECLARE_CSR): Ditto.
2025-05-09RISC-V: Added vendor extensions, xmipscbop, xmipscmov, xmipsexectl and xmipslspChao-ying Fu2-0/+69
Spec: https://mips.com/wp-content/uploads/2025/03/P8700-F_Programmers_Reference_Manual_Rev1.82_3-19-2025.pdf Added MIPS vendor extensions, xmipscbop, xmipscmov, xmipsexectl and xmipslsp with verison 1.0. Passed binutils testsuites of targets elf32/elf64/linux32/linux64. Signed-off-by: Jovan Dmitrović <jovan.dmitrovic@htecgroup.com> Signed-off-by: Chao-ying Fu <cfu@wavecomp.com>
2025-04-07xcoff dynamic symbol string sanityAlan Modra1-12/+12
Sanity check symbol string table offsets, and tidy structs. "long" isn't a good choice for _l_zeroes and _l_offset since it can be 64 bits which blows out the size of the symbol struct unnecessarily. Also, all of the sizes in internal_ldsym need only be 32 bits, but I made them size_t because I didn't want to audit all expressions using them for overflow. bfd/ * xcofflink.c (_bfd_xcoff_canonicalize_dynamic_symtab): Sanity check symbol _l_offset. (xcoff_link_add_dynamic_symbols), (xcoff_link_check_dynamic_ar_symbols): Likewise. include/ * coff/xcoff.h (struct internal_ldhdr): Tidy types. (struct internal_ldsym): Use uint32_t for _l_zeroes and _l_offset.
2025-03-26RISC-V: add Smrnmi 1.0 instruction supportJerry Zhang Jian2-0/+6
Add instruction `mnret' support Ref: https://github.com/riscv/riscv-isa-manual/blob/bb8b9127f81965eeff2d150c211d1c89376591c4/src/rnmi.adoc https://github.com/riscv/riscv-opcodes/blob/946eb673874b3a0f2474d1424dc28bc7ee53c306/extensions/rv_smrnmi bfd/ChangeLog: * elfxx-riscv.c: Add new Smrnmi instruction class handling gas/ChangeLog: * testsuite/gas/riscv/smrnmi.s: New test for mnret * testsuite/gas/riscv/rmrnmi.d: Likewise include/ChangeLog: * opcode/ricsv-opc.h: Add MATCH_MNRET, MASK_MNRET * opcode/riscv.h: Add new instruction class opcodes/ChangeLog: * riscv-opc.c: Add `mnret' instruction Signed-off-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com>
2025-03-18RISC-V: Add extension XTheadVdot for T-Head VECTOR vendor extension [1]Jin Ma2-0/+16
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the additional extension "XTheadVdot" based on the "V" extension, and it provides four 8-bit multiply and add with 32-bit instructions for the "v" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([2]). Co-Authored-By: Lifang Xia <lifang_xia@linux.alibaba.com> [1] https://github.com/XUANTIE-RV/thead-extension-spec/tree/master/xtheadvdot [2] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Add support for "XTheadVdot" extension. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * doc/c-riscv.texi: Likewise. * testsuite/gas/riscv/march-help.l: Likewise. * testsuite/gas/riscv/x-thead-vdot.d: New test. * testsuite/gas/riscv/x-thead-vdot.s: New test. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VMAQA_VV): New. * opcode/riscv.h (enum riscv_insn_class): Add insn class for XTheadVdot. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2025-03-10Revert past commitsSimon Marchi2-100/+92
I accidentally pushed my work-in-progress branch... revert that. Sorry for the noise :(. The list of commits reverted are: ae2a50a9ae15 attempt to revamp to the CU/TU list e9386435c94f gdb/dwarf: print DWARF CUs/TUs in "maint print objfiles" 6cbd64aa3eb0 gdb/dwarf: add dwarf_source_language_name 32a187da7622 libiberty: move DW_LANG_* definitions to dwarf2.def b3fa38aef59d gdb/dwarf: move index unit vectors to debug names reader and use them 30ba74418982 gdb/dwarf: track comp and type units count bedb4e09f292 gdb/dwarf: remove unnecessary braces b4f18de12c77 gdb/dwarf: use ranged for loop in some pots Change-Id: I80aed2847025f5b15c16c997680783b39858a703
2025-03-10libiberty: move DW_LANG_* definitions to dwarf2.defSimon Marchi2-92/+100
In order to get a "DW_LANG_* to string" function: - move the "DW_LANG_*" definitions from dwarf2.h to dwarf2.def - add the necessary macros in dwarf2.h to generate the enumeration - add the necessary macros in dwarfnames.c to generate the "to string" function include/ChangeLog: * dwarf2.h (DW_LANG, DW_FIRST_LANG, DW_END_LANG): Define then undefine. (enum dwarf_source_language): Remove. (get_DW_LANG_name): Declare. * dwarf2.def: Define DW_LANG_* constants. libiberty/ChangeLog: * dwarfnames.c (DW_FIRST_LANG, DW_END_LANG, DW_LANG): Define then undefine. Change-Id: I440aa2b1f55c7585d7e44c8fa7c41310b0ef2b3a Cc: binutils@sourceware.org
generated by cgit v1.1 at 2025-07-13 17:00:01 +0000