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| author | Ezra Sitorus <ezra.sitorus@arm.com> | 2025-06-13 17:57:03 +0100 |
|---|---|---|
| committer | Alice Carlotti <alice.carlotti@arm.com> | 2025-06-19 14:36:33 +0100 |
| commit | 4a6d6c97ca2204844631488a9985494c2752a11d (patch) | |
| tree | bc65f50b3c5be73188410f79a2f210f7fd09c59d /include | |
| parent | a1f853de0ffdd4b9141479033f96cf56ca306b1b (diff) | |
| download | binutils-4a6d6c97ca2204844631488a9985494c2752a11d.zip binutils-4a6d6c97ca2204844631488a9985494c2752a11d.tar.gz binutils-4a6d6c97ca2204844631488a9985494c2752a11d.tar.bz2 | |
aarch64: Support for FEAT_SVE_F16F32MM, FEAT_F8F16M, FEAT_F8F32MM
FEAT_SVE_F16F32MM introduces the SVE half-precision floating-point
matrix multiply-accumulate to single-precision instruction.
FEAT_F8F32MM introduces the Advanced SIMD 8-bit floating-point matrix
multiply-accumulate to single-precision instruction.
FEAT_F8F16MM introduces the Advanced SIMD 8-bit floating-point matrix
multiply-accumulate to half-precision instruction.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/aarch64.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index a2cc97a..5f3895f 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -234,6 +234,12 @@ enum aarch64_feature_bit { AARCH64_FEATURE_SME2p1, /* SVE2.1 instructions. */ AARCH64_FEATURE_SVE2p1, + /* SVE_F16F32MM instructions. */ + AARCH64_FEATURE_SVE_F16F32MM, + /* F8F32MM instructions. */ + AARCH64_FEATURE_F8F32MM, + /* F8F16MM instructions. */ + AARCH64_FEATURE_F8F16MM, /* RCPC3 instructions. */ AARCH64_FEATURE_RCPC3, /* Enhanced Software Step Extension. */ |