Implement OpAsmOpInterface for most ops to increase IR readability. For
example `mesh.process_linear_index` would produce a value with name
`proc_linear_idx`.

src0 and src1 are packed f16/bf16, we are printing literals like
0x40002000, but we cannot parse it.

This was broken by 91a38462.

stdbit.h isn't complete yet, but looking to turn these on on more
targets for
earlier feedback.

For reasons that are not clear to me, on arm64, the alias registers are
listed in list of register info's we do completion against, but for
x86_64 they are not. Maybe this is a difference in how the dynamic
register builders work for the two systems. Anyway, it doesn't look
possible to make a generic one.

Summary:
The PTX target supports the f16 type natively and we alreaqdy have a few
LLVM backend tests that support the LLVM-IR. We should be able to enable
this for generic use. This is done prior the f16 math functions being
written in the GPU libc case.

The corresponding fp8 conversion instructions are available for a
subtarget when and only when the subtarget "HasFP8ConversionInsts". We
should not assume all the future subtargets (gfx12+) have
FP8ConversionInsts.
  In this patch, we use OtherPredicates to carry HasFP8ConversionInsts
feature. This is because SubtargetPredicate is not copied from pseudos
to reals for DPP16 and DPP6. To avoid overriding OtherPredicates in a
few places, we use the newly introduced True16Predicate to hold
UseRealTrue16Insts instead.
 This work repalces the inadvertently closed pull request:
https://github.com/llvm/llvm-project/pull/82024

Canonicalize `-D` and `-U` flags by sorting them and only keeping the
last instance of a given name.

This optimization will only fire if all `-D` and `-U` flags start with a
simple identifier that we can guarantee a simple analysis of can
determine if two flags refer to the same identifier or not. See the
comment on `getSimpleMacroName()` for details of what the issues are.

This should avoid the issue with Windows paths that have caused failures on
some builders.

This was previously enabled since v2bf16 was represented by v2f16. As of
now it is NFC since we only have dot instructions which could use it,
but currently folding is guarded by the hasDOTOpSelHazard().

Ensure that the compiler emits a hard error for a generic interface with
ambiguous specific procedures when it is declared as such, and the
ambiguity doesn't involve optional or unlimited polymorphic dummy data
arguments. But: emit an optional portability warning when the ambiguity
in the generic interface is due to USE association's merging of multiple
generics, as USE association may involve modules not under control of
the programmer; we'll emit a hard error message if any the actual
arguments in a particular reference to the generic procedure doesn't
resolve to exactly one specific procedure. And don't emit warnings when
potential ambiguity due to USE association is taking place in a module
file; the warnings, if any, will have been produced when the module file
was compiled.

Fixes issue preventing builds on ARM-based Macs.

https://github.com/llvm/llvm-project/issues/82205

.

Co-authored-by: Moshe Berman <mosheberman@users.noreply.github.com>

This is a follow-on to:

https://github.com/llvm/llvm-project/pull/82085

The completer for register names was missing from the argument table. I
somehow missed that the only register completer test was x86_64, so that
test broke.

I added the completer in to the right slot in the argument table, and
added a small completions test that just uses the alias register names.
If we end up having a platform that doesn't define register names, we'll
have to skip this test there, but it should add a sniff test for
register completion that will run most everywhere.

Apply clang-tidy fixes for performance-unnecessary-value-param in FileLineColLocBreakpointManagerTest.cpp (NFC)

Added support to vectorized tensor.unpack. The unpack Op is split into a
`vector.transfer_read`, `vector.transpose`, `vector.shape_cast` and a
`vector.transfer_write`.

Four "issues" on GitHub report possible performance problems, likely
detected by static analysis. None of them would ever make a measureable
difference in compilation time, but I'm resolving them to clean up the
open issues list.

Fixes https://github.com/llvm/llvm-project/issues/79703, .../79705,
.../79706, & .../79707.

https://reviews.llvm.org/D150510 places .lrodata before .rodata to
minimize the number of permission transitions in the memory image.
However, this layout is less ideal for -fno-pic code (which is still
important).

Small code model -fno-pic code has R_X86_64_32S relocations with a range
of `[0,2**31)` (if we ignore the negative area). Placing `.lrodata`
earlier exerts relocation pressure on such code. Non-x86 64-bit
architectures generally have a similar `[0,2**31)` limitation if they
don't use PC-relative relocations.

If we place .lrodata later, we will need one extra PT_LOAD. Two layouts
are appealing:

* .bss/.lbss/.lrodata/.ldata (GNU ld)
* .bss/.ldata/.lbss/.lrodata

The GNU ld layout has the nice property that there is only one BSS
(except .tbss/.relro_padding). Add -z lrodata-after-bss to support
this layout.

Since a read-only PT_LOAD segment (for large data sections) may appear
after RW PT_LOAD segments. The placement of `_etext` has to be ...

An implied ENDFILE record, which truncates an external file, should be
written to a sequential unit whenever the file is repositioned for a
BACKSPACE or REWIND statement if a WRITE statement has executed since
the last OPEN/BACKSPACE/REWIND.

But the REC= and POS= positioning specifiers don't apply to sequential
units (they're for direct and stream units, resp.), so don't truncate
the file when they're used.

The hook HexagonInstrInfo::isValidOffset() is updated to evaluate
offsets of missed LD/ST vector instructions.

I implemented legacy "token pasting" via line continuation for

  call prefix&
    &MACRO&
    &suffix(1)

in a recent patch; this patch addresses the related cases

  call prefix&
    &MACRO&
    &(1)

and

  call &
    &MACRO&
    &suffix(1)

Fixes the latest https://github.com/llvm/llvm-project/issues/79590.

Follow-up for #81422. My intention is to write an e2e test targetting
SVE, but more work is needed. Sending this as an intermiedate step.

errorOrWarn is more conventional for recoverable errors. This error
message does not have to use `fatal`, and we try to remove such uses in
parallel code paths.

Will be useful for implementing C23 stdbit.h's stdc_count_zeros and
stdc_count_ones.

Implemented few entry points for REAL(16) math in FortranF128Math
static library. It is a thin wrapper around GNU libquadmath.
Flang driver can always link it, and the dependencies will
be brought in as needed.
The final Fortran program/library that uses any of the entry points
will depend on the underlying third-party library - this dependency
has to be resolved somehow. I added FLANG_RUNTIME_F128_MATH_LIB
CMake control so that the compiler driver and the runtime library
can be built using the same third-party library: this way the linker
knows which dependency to link in (under --as-needed).
The compiler distribution should specify which third-party library
is required for linking/running the apps that use REAL(16).
The compiler package may provide a version of the third-party library
or at least a stub library that can be used for linking, but
the final program execution will still require the actual library.

Fixes a type error in UniqueNoPred test, that is causing the
ppc64le-lld-multistage-test buildbot to fail.

… types." (#82285)

This reverts commit d9f9775a.

The test was missing a `REQUIRES: object-emission`.

[LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (#81937)

Because loops in coroutines may have a co_await statement that
reschedules the coroutine to another thread, we cannot cache addresses
of thread-local variables obtained inside a loop by moving the
computation of thoes addresses outside a loop.

Since LLVM doesn't have a model for coroutine memory accesses, this
patch fixes this bug by disabling this optimization for coroutines in
the same way as https://reviews.llvm.org/D135550 and
https://reviews.llvm.org/D151774.

In WebAssembly, we have `WASM_SYMBOL_NO_STRIP` symbol flag to mark the
referenced content as retained. However, the flag is not enough to
express retained data that is not referenced by any symbol. This patch
adds a new segment flag`WASM_SEG_FLAG_RETAIN` to support "private"
linkage data that is retained by llvm.used.

This kind of data that is not referenced but must be retained is usually
used with encapsulation symbols (__start/__stop). Swift runtime uses
this technique and depends on the fact "all metadata sections in live
objects are retained", which was not guaranteed with `--gc-sections`
before this patch.

This is a revised version of https://reviews.llvm.org/D126950 (has been
reverted) based on @MaskRay's comments

According to [expr.prim.id.qual] p3:
> The _nested-name-specifier_ `​::` nominates the global namespace. A
_nested-name-specifier_ with a _computed-type-specifier_ nominates the
type denoted by the _computed-type-specifier_, which shall be a class or
enumeration type. **If a _nested-name-specifier_ `N` is declarative and
has a _simple-template-id_ with a template argument list `A` that
involves a template parameter, let `T` be the template nominated by `N`
without `A`. `T` shall be a class template.**

Meaning, the out-of-line definition of `A::f` in the following example
is ill-formed:
```
template<typename T>
struct A 
{ 
    void f(); 
};

template<typename T>
using B = A<T>;

template<typename T>
void B<T>::f() { } // error: a declarative nested name specifier cannot name an alias template
```

This patch diagnoses such cases as an extension (in group `alias-template-in-declaration-name`).

The SectCreateMaterializationUnit creates a LinkGraph with a single named
section containing a single named block whose content is given by a
MemoryBuffer. It is intended to support emulation of ld64's -sectcreate option.

Summary:
This cleans up the handling of hermetic test flags. Primarily done to
simplify the GPU rework patch.