Deallocation of intent(out) allocatable was done in D133348. This patch adds
an if guard when the deallocation is done through a runtime call. The runtime
is crashing if the box is not allocated. Call the runtime only if the box is
allocated. This is the case for derived type, polymorphic and unlimited
polymorphic entities.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D141427

This is part of selecting `G_ATOMIC*` instructions. Select `isync`, `sync` and `lwsync` in GISel.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D141360

[LoongArch] Fixed llvm/test/CodeGen/LoongArch/intrinsic.ll test failure when EXPENSIV_CHECK is enabled [1].

Specifically:
```
*** Bad machine code: Using an undefined physical register ***
- function:    movgr2fcsr
- basic block: %bb.0 entry (0x1af5e60)
- instruction: MOVGR2FCSR $fcsr1, %0:gpr
- operand 0:   $fcsr1

*** Bad machine code: Using an undefined physical register ***
- function:    movfcsr2gr
- basic block: %bb.0 entry (0x133fae0)
- instruction: %0:gpr = MOVFCSR2GR $fcsr1
- operand 1:   $fcsr1
```

By building MachineInstructions, the state of the register is
clarified, and the error caused by using undefined physical registers
is fixed.

[1]: https://lab.llvm.org/buildbot/#/builders/16/builds/41677

The file hierarchy is reorganized into:

```
├── rvv-intrinsics-autogenerated
│   ├── non-policy
│   │   ├── non-overloaded
│   │   └── overloaded
│   └── policy
│       ├── non-overloaded
│       └── overloaded
└── rvv-intrinsics-handcrafted
```

Separating auto-generated test cases and hand-craft ones. The
auto-generated ones are basic API tests generated from the intrinsic
generator [0].

This re-organization allows direct copy-and-paste from the produced
outputs of the generator in future API changes, which is discussed
and needs to be implemented towards a v1.0 RVV intrinsic.

[0] https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/181

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141198

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D141428

Fixes https://github.com/llvm/llvm-project/issues/59777

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D140836

Differential Revision: https://reviews.llvm.org/D141236

This patch allows optimizeLoopExitWithUnknownExitCount to deal with
branches by conditions that are not immediately ICmp's, but aggregates
of ICmp's joined by arithmetic or logical AND/OR. Each ICmp is optimized
independently.

Differential Revision: https://reviews.llvm.org/D139832
Reviewed By: nikic

This has been obsoleted by C++ thread_local for a long time.
As far as I know, Xcode was the last supported toolchain to add
support for C++ thread_local in 2016.

As a precaution, use LLVM_THREAD_LOCAL which provides even greater
backwards compatibility, allowing this to function even pre-C++11
versions of GCC.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D141349

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D141344

This patch properly recognizes the generic selection expression
introduced in C11, by adding an additional token type for the colons
present in such expressions.

Previously, they would be recognized as
"inline ASM colons" purely by the fact that those are the last thing
checked for.

I tried to avoid adding an addition token type, but since colons by
default like having spaces around them, I chose to add a new type so
that no space is added after the type selector.

Currently, no aspect of the formatting of these expressions in able to
be configured, as I'm not sure what could even be configured here.

One notable thing is that association list is always formatted as
either entirely on one line, if it can fit, or with line breaks
after every comma in the expression (also after the controlling expr.)

This visually makes them more similar to switch statements when long,
matching the behaviour of the selection expression, being that of a sort
of switch on types, but also allows for terseness when only selecting
for a few things.

Fixes https://github.com/llvm/llvm-project/issues/18080

Reviewed By: HazardyKnusperkeks, owenpan, MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D139211

D119599 added the ability to align compound assignments, right aligning
them in order to line up at the equals sign.
However, that patch didn't account for AlignTokens being called
recursively across scopes, which reset the right justification to be
false in any scope besides the top scope. This meant the compound
assignments were aligned, just not at the right place.
(No tests also ever introduced any scopes)

This patch makes sure to inherit the right justification value, just as
every other parameter is passed on.

Fixes https://github.com/llvm/llvm-project/issues/58029

Reviewed By: HazardyKnusperkeks, owenpan, MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D141288

https://alive2.llvm.org/ce/z/Uy_x_b

Fix: https://github.com/llvm/llvm-project/issues/59902

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D141359

Prevent creating a vector of size 0 that would fail verifier.
Vector 1d with a single element should be treated like 0d vectors.

Differential Revision: https://reviews.llvm.org/D141452

When use llc -mattr=+avx512fp16, it will crash.

```
define half @test(<64 x half> %x, i64 %idx){
   %res = extractelement <64 x half> %x, i64 %idx
   ret half %res
}
```
The root cause is when we enable avx512fp16 we lose custom handler
for extract f16 from big vectors which is not loaded from pointer.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D141348

libLLVM.so is empty if it is built with Android NDK (`-DLLVM_BUILD_LLVM_DYLIB=ON`). The patch fixes it.

Reviewed By: xbolva00

Differential Revision: https://reviews.llvm.org/D140268

Canonicalize identity affine.min/max to allow further optimization to follow the def-use chain of the given values. The reported issue is https://github.com/llvm/llvm-project/issues/59399.

Differential Revision: https://reviews.llvm.org/D141354

For D16 memory load instructions, the hardware usually only write to half
of the 32bit register, but we define the destination register using
32bit register for the MachineIR instruction. Without the extra tied
source register, LLVM framework will think previous write to the other
half of the register being dead. This is because by using 32bit register
as the destination register, LLVM will think the instruction will always
overwrite the whole 32bit register. By adding the extra tied source,
LLVM will think we are reading the register, so previous write to the
register will not be dead. This dummy tied source is introducing
unnecessary read-after-write dependency. The change here is to bypass the
tied source that can be skipped, thus avoiding an unnecessary s_waitcnt.

Reviewed by: foad

Differential Revision: https://reviews.llvm.org/D140537

This bit is not set/reserved in td file. Let's remove it for now,
we can always add it back if we need it.

Reviewed by: foad

Differential Revision: https://reviews.llvm.org/D141223

Reviewed by: arsenm

Differential Revision: https://reviews.llvm.org/D140599

The runtime initializes this.

This reverts commit b5cb91fc.

This commit causes expensive check fail:
https://lab.llvm.org/buildbot/#/builders/16/builds/41677.

The problem is happened when base class member field is used in target
region , the size is wrong, cause runtime to fail. Currently the size of
calculation is depended on index of field, since field is in base class,
the calculation is wrong.

According OpenMP 5.2 148:21:
If the target construct is within a class non-static member function,
and a variable is an accessible data member of the object for which the
non-static data member function is invoked, the variable is treated as
if the this[:1] expression had appeared in a map clause with a map-type
of tofrom.

One way to fix this is emitting code to generate this[:1] instead only
when class has any base class.

Differential Revision: https://reviews.llvm.org/D141350

Previous attempt to restrict this test to x86 and aarch64 targets only didn't work.
So XFAIL this test while investigating to get the AIX bot back to green.

Differential Revision: https://reviews.llvm.org/D141415

[libc++] Use _LIBCPP_HIDE_FROM_ABI_VIRTUAL instead of _LIBCPP_INLINE_VISIBILITY attribute on virtual function

Reviewed By: #libc, philnik, ldionne

Differential Revision: https://reviews.llvm.org/D141388

The Xcode standalone build doesn't have the install-liblldb and
install-liblldb-stripped targets. Fix the resulting CMake error "Cannot
add target-level dependencies to non-existent target" by only adding the
dependency when the targets exist.

There's a bit of duplication in use of `common_input_iterator` as noted in
https://reviews.llvm.org/D141216.  Lift `common_input_iterator` into
`test_iterators.h`.

Differential Revision: https://reviews.llvm.org/D141238

Implemented LSAN interface on HwasanThreadList and added os_id to __hwasan::Thread.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D141143